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Searched refs:kOutputs_Uqadd8_RdIsRm_al_r4_r3_r4 (Results 1 – 2 of 2) sorted by relevance

/external/vixl/test/aarch32/traces/
Dsimulator-cond-rd-rn-rm-uqadd8-t32.h2976 const Inputs kOutputs_Uqadd8_RdIsRm_al_r4_r3_r4[] = { variable
8996 ARRAY_SIZE(kOutputs_Uqadd8_RdIsRm_al_r4_r3_r4),
8997 kOutputs_Uqadd8_RdIsRm_al_r4_r3_r4,
Dsimulator-cond-rd-rn-rm-uqadd8-a32.h2976 const Inputs kOutputs_Uqadd8_RdIsRm_al_r4_r3_r4[] = { variable
8996 ARRAY_SIZE(kOutputs_Uqadd8_RdIsRm_al_r4_r3_r4),
8997 kOutputs_Uqadd8_RdIsRm_al_r4_r3_r4,