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Searched refs:kOutputs_Uqsax_RdIsNotRnIsNotRm_al_r14_r4_r6 (Results 1 – 2 of 2) sorted by relevance

/external/vixl/test/aarch32/traces/
Dsimulator-cond-rd-rn-rm-uqsax-t32.h8632 const Inputs kOutputs_Uqsax_RdIsNotRnIsNotRm_al_r14_r4_r6[] = { variable
9108 ARRAY_SIZE(kOutputs_Uqsax_RdIsNotRnIsNotRm_al_r14_r4_r6),
9109 kOutputs_Uqsax_RdIsNotRnIsNotRm_al_r14_r4_r6,
Dsimulator-cond-rd-rn-rm-uqsax-a32.h8632 const Inputs kOutputs_Uqsax_RdIsNotRnIsNotRm_al_r14_r4_r6[] = { variable
9108 ARRAY_SIZE(kOutputs_Uqsax_RdIsNotRnIsNotRm_al_r14_r4_r6),
9109 kOutputs_Uqsax_RdIsNotRnIsNotRm_al_r14_r4_r6,