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Searched refs:kOutputs_Uqsub16_RdIsRnIsRm_al_r1_r1_r1 (Results 1 – 2 of 2) sorted by relevance

/external/vixl/test/aarch32/traces/
Dsimulator-cond-rd-rn-rm-uqsub16-t32.h325 const Inputs kOutputs_Uqsub16_RdIsRnIsRm_al_r1_r1_r1[] = { variable
8900 ARRAY_SIZE(kOutputs_Uqsub16_RdIsRnIsRm_al_r1_r1_r1),
8901 kOutputs_Uqsub16_RdIsRnIsRm_al_r1_r1_r1,
Dsimulator-cond-rd-rn-rm-uqsub16-a32.h325 const Inputs kOutputs_Uqsub16_RdIsRnIsRm_al_r1_r1_r1[] = { variable
8900 ARRAY_SIZE(kOutputs_Uqsub16_RdIsRnIsRm_al_r1_r1_r1),
8901 kOutputs_Uqsub16_RdIsRnIsRm_al_r1_r1_r1,