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Searched refs:kOutputs_Usub16_RdIsRnIsRm_al_r4_r4_r4 (Results 1 – 2 of 2) sorted by relevance

/external/vixl/test/aarch32/traces/
Dsimulator-cond-rd-rn-rm-usub16-a32.h424 const Inputs kOutputs_Usub16_RdIsRnIsRm_al_r4_r4_r4[] = { variable
8912 ARRAY_SIZE(kOutputs_Usub16_RdIsRnIsRm_al_r4_r4_r4),
8913 kOutputs_Usub16_RdIsRnIsRm_al_r4_r4_r4,
Dsimulator-cond-rd-rn-rm-usub16-t32.h424 const Inputs kOutputs_Usub16_RdIsRnIsRm_al_r4_r4_r4[] = { variable
8912 ARRAY_SIZE(kOutputs_Usub16_RdIsRnIsRm_al_r4_r4_r4),
8913 kOutputs_Usub16_RdIsRnIsRm_al_r4_r4_r4,