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Searched refs:kOutputs_Usub16_RnIsRm_al_r5_r10_r10 (Results 1 – 2 of 2) sorted by relevance

/external/vixl/test/aarch32/traces/
Dsimulator-cond-rd-rn-rm-usub16-a32.h6612 const Inputs kOutputs_Usub16_RnIsRm_al_r5_r10_r10[] = { variable
9068 ARRAY_SIZE(kOutputs_Usub16_RnIsRm_al_r5_r10_r10),
9069 kOutputs_Usub16_RnIsRm_al_r5_r10_r10,
Dsimulator-cond-rd-rn-rm-usub16-t32.h6612 const Inputs kOutputs_Usub16_RnIsRm_al_r5_r10_r10[] = { variable
9068 ARRAY_SIZE(kOutputs_Usub16_RnIsRm_al_r5_r10_r10),
9069 kOutputs_Usub16_RnIsRm_al_r5_r10_r10,