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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Sparc/
Dsparc-mem-instructions.s4 ! CHECK: ldsb [%i0+%l6], %o2 ! encoding: [0xd4,0x4e,0x00,0x16]
5 ldsb [%i0 + %l6], %o2
10 ! CHECK: ldsba [%i0+%l6] 131, %o2 ! encoding: [0xd4,0xce,0x10,0x76]
11 ldsba [%i0 + %l6] 131, %o2
13 ! CHECK: ldsh [%i0+%l6], %o2 ! encoding: [0xd4,0x56,0x00,0x16]
14 ldsh [%i0 + %l6], %o2
19 ! CHECK: ldsha [%i0+%l6] 131, %o2 ! encoding: [0xd4,0xd6,0x10,0x76]
20 ldsha [%i0 + %l6] 131, %o2
22 ! CHECK: ldub [%i0+%l6], %o2 ! encoding: [0xd4,0x0e,0x00,0x16]
23 ldub [%i0 + %l6], %o2
[all …]
Dleon-instructions.s8 ! CHECK: casa [%i0] 10, %l6, %o2 ! encoding: [0xd5,0xe6,0x01,0x56]
9 casa [%i0] 10, %l6, %o2
11 ! CHECK: casa [%i0] 5, %l6, %o2 ! encoding: [0xd5,0xe6,0x00,0xb6]
12 casa [%i0] 5, %l6, %o2
14 ! CHECK: umac %i0, %l6, %o2 ! encoding: [0x95,0xf6,0x00,0x16]
15 ! CHECK_NO_CASA: umac %i0, %l6, %o2 ! encoding: [0x95,0xf6,0x00,0x16]
16 umac %i0, %l6, %o2
18 ! CHECK: smac %i0, %l6, %o2 ! encoding: [0x95,0xfe,0x00,0x16]
19 ! CHECK_NO_CASA: smac %i0, %l6, %o2 ! encoding: [0x95,0xfe,0x00,0x16]
20 smac %i0, %l6, %o2
Dsparcv9-atomic-instructions.s6 ! CHECK: cas [%i0], %l6, %o2 ! encoding: [0xd5,0xe6,0x10,0x16]
7 cas [%i0], %l6, %o2
9 ! CHECK: casx [%i0], %l6, %o2 ! encoding: [0xd5,0xf6,0x10,0x16]
10 casx [%i0], %l6, %o2
Dsparc-atomic-instructions.s7 ! CHECK: swap [%i0+%l6], %o2 ! encoding: [0xd4,0x7e,0x00,0x16]
8 swap [%i0+%l6], %o2
13 ! CHECK: swapa [%i0+%l6] 131, %o2 ! encoding: [0xd4,0xfe,0x10,0x76]
14 swapa [%i0+%l6] 131, %o2
/external/llvm/test/MC/Sparc/
Dsparc-mem-instructions.s4 ! CHECK: ldsb [%i0+%l6], %o2 ! encoding: [0xd4,0x4e,0x00,0x16]
5 ldsb [%i0 + %l6], %o2
10 ! CHECK: ldsba [%i0+%l6] 131, %o2 ! encoding: [0xd4,0xce,0x10,0x76]
11 ldsba [%i0 + %l6] 131, %o2
13 ! CHECK: ldsh [%i0+%l6], %o2 ! encoding: [0xd4,0x56,0x00,0x16]
14 ldsh [%i0 + %l6], %o2
19 ! CHECK: ldsha [%i0+%l6] 131, %o2 ! encoding: [0xd4,0xd6,0x10,0x76]
20 ldsha [%i0 + %l6] 131, %o2
22 ! CHECK: ldub [%i0+%l6], %o2 ! encoding: [0xd4,0x0e,0x00,0x16]
23 ldub [%i0 + %l6], %o2
[all …]
Dleon-instructions.s8 ! CHECK: casa [%i0] 10, %l6, %o2 ! encoding: [0xd5,0xe6,0x01,0x56]
9 casa [%i0] 10, %l6, %o2
11 ! CHECK: casa [%i0] 5, %l6, %o2 ! encoding: [0xd5,0xe6,0x00,0xb6]
12 casa [%i0] 5, %l6, %o2
14 ! CHECK: umac %i0, %l6, %o2 ! encoding: [0x95,0xf6,0x00,0x16]
15 ! CHECK_NO_CASA: umac %i0, %l6, %o2 ! encoding: [0x95,0xf6,0x00,0x16]
16 umac %i0, %l6, %o2
18 ! CHECK: smac %i0, %l6, %o2 ! encoding: [0x95,0xfe,0x00,0x16]
19 ! CHECK_NO_CASA: smac %i0, %l6, %o2 ! encoding: [0x95,0xfe,0x00,0x16]
20 smac %i0, %l6, %o2
Dsparcv9-atomic-instructions.s6 ! CHECK: cas [%i0], %l6, %o2 ! encoding: [0xd5,0xe6,0x10,0x16]
7 cas [%i0], %l6, %o2
9 ! CHECK: casx [%i0], %l6, %o2 ! encoding: [0xd5,0xf6,0x10,0x16]
10 casx [%i0], %l6, %o2
Dsparc-atomic-instructions.s7 ! CHECK: swap [%i0+%l6], %o2 ! encoding: [0xd4,0x7e,0x00,0x16]
8 swap [%i0+%l6], %o2
13 ! CHECK: swapa [%i0+%l6] 131, %o2 ! encoding: [0xd4,0xfe,0x10,0x76]
14 swapa [%i0+%l6] 131, %o2
/external/llvm/test/MC/Disassembler/Sparc/
Dsparc-mem.txt3 # CHECK: ldsb [%i0+%l6], %o2
15 # CHECK: ldsh [%i0+%l6], %o2
27 # CHECK: ldub [%i0+%l6], %o2
39 # CHECK: lduh [%i0+%l6], %o2
51 # CHECK: ld [%i0+%l6], %o2
63 # CHECK: ld [%i0+%l6], %f2
75 # CHECK: ldd [%i0+%l6], %f2
87 # CHECK: ldq [%i0+%l6], %f4
99 # CHECK: ldx [%i0+%l6], %o2
111 # CHECK: ldsw [%i0+%l6], %o2
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Sparc/
Dsparc-mem.txt3 # CHECK: ldsb [%i0+%l6], %o2
15 # CHECK: ldsh [%i0+%l6], %o2
27 # CHECK: ldub [%i0+%l6], %o2
39 # CHECK: lduh [%i0+%l6], %o2
51 # CHECK: ld [%i0+%l6], %o2
63 # CHECK: ld [%i0+%l6], %f2
75 # CHECK: ldd [%i0+%l6], %f2
87 # CHECK: ldq [%i0+%l6], %f4
99 # CHECK: ldx [%i0+%l6], %o2
111 # CHECK: ldsw [%i0+%l6], %o2
[all …]
/external/capstone/suite/MC/Sparc/
Dsparc-mem-instructions.s.cs2 0xd4,0x4e,0x00,0x16 = ldsb [%i0+%l6], %o2
5 0xd4,0x56,0x00,0x16 = ldsh [%i0+%l6], %o2
8 0xd4,0x0e,0x00,0x16 = ldub [%i0+%l6], %o2
11 0xd4,0x16,0x00,0x16 = lduh [%i0+%l6], %o2
14 0xd4,0x06,0x00,0x16 = ld [%i0+%l6], %o2
17 0xd4,0x2e,0x00,0x16 = stb %o2, [%i0+%l6]
20 0xd4,0x36,0x00,0x16 = sth %o2, [%i0+%l6]
23 0xd4,0x26,0x00,0x16 = st %o2, [%i0+%l6]
Dsparc-atomic-instructions.s.cs4 0xd4,0x7e,0x00,0x16 = swap [%i0+%l6], %o2
6 0xd5,0xe6,0x10,0x16 = cas [%i0], %l6, %o2
7 0xd5,0xf6,0x10,0x16 = casx [%i0], %l6, %o2
/external/llvm/test/CodeGen/SPARC/
D64spill.ll13 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
24 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
35 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
47 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
58 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
69 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
80 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
91 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
102 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
113 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SPARC/
D64spill.ll13 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
24 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
35 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
47 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
58 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
69 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
80 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
91 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
102 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
113 …,~{g2},~{g3},~{g4},~{g5},~{g6},~{g7},~{l0},~{l1},~{l2},~{l3},~{l4},~{l5},~{l6},~{l7},~{o0},~{o1},~…
/external/clang/test/CodeGenObjC/
Dproperty-complex.m49 _Complex float l6 = (a0.p0 = a0.p0);
58 printf("l6: %.2f + %.2fi\n", __real l6, __imag l6);
/external/llvm/test/CodeGen/SystemZ/
Dframe-03.ll48 %l6 = load volatile double , double *%ptr
64 %add6 = fadd double %l6, %add5
130 %l6 = load volatile double , double *%ptr
145 %add6 = fadd double %l6, %add5
196 %l6 = load volatile double , double *%ptr
205 %add6 = fadd double %l6, %add5
240 %l6 = load volatile double , double *%ptr
248 %add6 = fadd double %l6, %add5
Dframe-02.ll46 %l6 = load volatile float , float *%ptr
62 %add6 = fadd float %l6, %add5
128 %l6 = load volatile float , float *%ptr
143 %add6 = fadd float %l6, %add5
194 %l6 = load volatile float , float *%ptr
203 %add6 = fadd float %l6, %add5
238 %l6 = load volatile float , float *%ptr
246 %add6 = fadd float %l6, %add5
Dframe-18.ll24 %l6 = load volatile i32 , i32 *%ptr
43 store volatile i32 %l6, i32 *%ptr
66 %l6 = load volatile i64 , i64 *%ptr
85 store volatile i64 %l6, i64 *%ptr
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dframe-03.ll48 %l6 = load volatile double, double *%ptr
64 %add6 = fadd double %l6, %add5
130 %l6 = load volatile double, double *%ptr
145 %add6 = fadd double %l6, %add5
196 %l6 = load volatile double, double *%ptr
205 %add6 = fadd double %l6, %add5
240 %l6 = load volatile double, double *%ptr
248 %add6 = fadd double %l6, %add5
Dframe-02.ll46 %l6 = load volatile float, float *%ptr
62 %add6 = fadd float %l6, %add5
128 %l6 = load volatile float, float *%ptr
143 %add6 = fadd float %l6, %add5
194 %l6 = load volatile float, float *%ptr
203 %add6 = fadd float %l6, %add5
238 %l6 = load volatile float, float *%ptr
246 %add6 = fadd float %l6, %add5
Dframe-18.ll24 %l6 = load volatile i32, i32 *%ptr
43 store volatile i32 %l6, i32 *%ptr
66 %l6 = load volatile i64, i64 *%ptr
85 store volatile i64 %l6, i64 *%ptr
Dframe-17.ll40 %l6 = load volatile float, float *%ptr
61 store volatile float %l6, float *%ptr
101 %l6 = load volatile double, double *%ptr
122 store volatile double %l6, double *%ptr
/external/libvpx/libvpx/vp9/encoder/mips/msa/
Dvp9_fdct16x16_msa.c158 v8i16 l0, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15; in fadst16_transpose_postproc_msa() local
161 LD_SH8(input, 16, l0, l1, l2, l3, l4, l5, l6, l7); in fadst16_transpose_postproc_msa()
162 TRANSPOSE8x8_SH_SH(l0, l1, l2, l3, l4, l5, l6, l7, r0, r1, r2, r3, r4, r5, r6, in fadst16_transpose_postproc_msa()
183 LD_SH8(input, 16, l0, l1, l2, l3, l4, l5, l6, l7); in fadst16_transpose_postproc_msa()
184 TRANSPOSE8x8_SH_SH(l0, l1, l2, l3, l4, l5, l6, l7, r0, r1, r2, r3, r4, r5, r6, in fadst16_transpose_postproc_msa()
339 v8i16 l0, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15; in fadst16_transpose_msa() local
342 LD_SH16(input, 8, l0, l8, l1, l9, l2, l10, l3, l11, l4, l12, l5, l13, l6, l14, in fadst16_transpose_msa()
344 TRANSPOSE8x8_SH_SH(l0, l1, l2, l3, l4, l5, l6, l7, r0, r1, r2, r3, r4, r5, r6, in fadst16_transpose_msa()
354 LD_SH16(input, 8, l0, l8, l1, l9, l2, l10, l3, l11, l4, l12, l5, l13, l6, l14, in fadst16_transpose_msa()
356 TRANSPOSE8x8_SH_SH(l0, l1, l2, l3, l4, l5, l6, l7, r0, r1, r2, r3, r4, r5, r6, in fadst16_transpose_msa()
/external/tensorflow/tensorflow/contrib/receptive_field/python/util/
Dgraph_compute_order_test.py53 l6 = slim.conv2d(l4, 1, [3, 3], stride=2, scope='L6', padding='SAME')
55 gen_math_ops.add(l5, l6, name='L7_add')
Dparse_layer_parameters_test.py55 l6 = slim.conv2d(l4, 1, [3, 3], stride=2, scope='L6', padding='SAME')
57 gen_math_ops.add(l5, l6, name='L7_add')

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