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Searched refs:lane1 (Results 1 – 12 of 12) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Darm64-addp.ll8 %lane1.i = extractelement <2 x double> %a, i32 1
9 %vpaddd.i = fadd double %lane0.i, %lane1.i
19 %lane1.i = extractelement <2 x i64> %a, i32 1
20 %vpaddd.i = add i64 %lane0.i, %lane1.i
29 %lane1.i = extractelement <2 x float> %a, i32 1
30 %vpaddd.i = fadd float %lane0.i, %lane1.i
Dfp16_intrinsic_lane.ll16 %lane1 = shufflevector <4 x half> %c, <4 x half> undef, <4 x i32> zeroinitializer
17 %fmla3 = tail call <4 x half> @llvm.fma.v4f16(<4 x half> %b, <4 x half> %lane1, <4 x half> %a)
27 %lane1 = shufflevector <4 x half> %c, <4 x half> undef, <8 x i32> zeroinitializer
28 %fmla3 = tail call <8 x half> @llvm.fma.v8f16(<8 x half> %b, <8 x half> %lane1, <8 x half> %a)
38 %lane1 = shufflevector <8 x half> %c, <8 x half> undef, <4 x i32> zeroinitializer
39 %0 = tail call <4 x half> @llvm.fma.v4f16(<4 x half> %lane1, <4 x half> %b, <4 x half> %a)
49 %lane1 = shufflevector <8 x half> %c, <8 x half> undef, <8 x i32> zeroinitializer
50 %0 = tail call <8 x half> @llvm.fma.v8f16(<8 x half> %lane1, <8 x half> %b, <8 x half> %a)
106 %lane1 = shufflevector <4 x half> %c, <4 x half> undef, <4 x i32> zeroinitializer
107 %fmla3 = tail call <4 x half> @llvm.fma.v4f16(<4 x half> %sub, <4 x half> %lane1, <4 x half> %a)
[all …]
Darm64-ld1.ll929 %lane1 = shufflevector <2 x i32> %tmp6, <2 x i32> undef, <2 x i32> zeroinitializer
930 %tmp7 = bitcast <2 x i32> %lane1 to <8 x i8>
Darm64-neon-2velem.ll2793 %lane1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
2794 %0 = tail call <4 x float> @llvm.fma.v4f32(<4 x float> %lane1, <4 x float> %b, <4 x float> %a)
2812 %lane1 = shufflevector <4 x float> %v, <4 x float> undef, <4 x i32> <i32 3, i32 3, i32 3, i32 3>
2813 %0 = tail call <4 x float> @llvm.fma.v4f32(<4 x float> %lane1, <4 x float> %b, <4 x float> %a)
/external/llvm/test/CodeGen/AArch64/
Darm64-addp.ll8 %lane1.i = extractelement <2 x double> %a, i32 1
9 %vpaddd.i = fadd double %lane0.i, %lane1.i
19 %lane1.i = extractelement <2 x i64> %a, i32 1
20 %vpaddd.i = add i64 %lane0.i, %lane1.i
29 %lane1.i = extractelement <2 x float> %a, i32 1
30 %vpaddd.i = fadd float %lane0.i, %lane1.i
Darm64-ld1.ll929 %lane1 = shufflevector <2 x i32> %tmp6, <2 x i32> undef, <2 x i32> zeroinitializer
930 %tmp7 = bitcast <2 x i32> %lane1 to <8 x i8>
/external/eigen/Eigen/src/Core/arch/AVX512/
DPacketMath.h474 Packet8f lane1 = _mm256_broadcast_ps((const __m128*)(const void*)(from + 4));
476 lane1 = _mm256_blend_ps(
477 lane1, _mm256_castps128_ps256(_mm_permute_ps(
478 _mm256_castps256_ps128(lane1), _MM_SHUFFLE(1, 0, 1, 0))),
482 lane1 = _mm256_permute_ps(lane1, _MM_SHUFFLE(3, 3, 2, 2));
487 return _mm512_insertf32x8(res, lane1, 1);
493 res = _mm512_insertf32x4(res, _mm256_extractf128_ps(lane1, 0), 2);
494 res = _mm512_insertf32x4(res, _mm256_extractf128_ps(lane1, 1), 3);
505 Packet4d lane1 = _mm256_broadcast_pd((const __m128d*)(const void*)(from + 2));
506 lane1 = _mm256_permute_pd(lane1, 3 << 2);
[all …]
/external/python/cpython3/Modules/_sha3/kcp/
DKeccakP-1600-opt64.c313 UINT64 lane1[1]; in KeccakP1600_ExtractBytesInLane() local
314 lane1[0] = lane; in KeccakP1600_ExtractBytesInLane()
315 memcpy(data, (UINT8*)lane1+offset, length); in KeccakP1600_ExtractBytesInLane()
390 UINT64 lane1[1]; in KeccakP1600_ExtractAndAddBytesInLane() local
391 lane1[0] = lane; in KeccakP1600_ExtractAndAddBytesInLane()
393 output[i] = input[i] ^ ((UINT8*)lane1)[offset+i]; in KeccakP1600_ExtractAndAddBytesInLane()
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dvlddup.ll235 %lane1 = shufflevector <8 x i8> %2, <8 x i8> undef, <8 x i32> zeroinitializer
240 store <8 x i8> %lane1, <8 x i8>* %r11, align 8
253 %lane1 = shufflevector <8 x i8> %2, <8 x i8> undef, <8 x i32> zeroinitializer
259 store <8 x i8> %lane1, <8 x i8>* %r10, align 8
272 %lane1 = shufflevector <8 x i8> %2, <8 x i8> undef, <8 x i32> zeroinitializer
278 store <8 x i8> %lane1, <8 x i8>* %r10, align 8
/external/libvpx/libvpx/vp9/common/arm/neon/
Dvp9_highbd_iht16x16_add_neon.c72 #define highbd_iadst_butterfly(in0, in1, c, lane0, lane1, s0, s1) \ argument
75 vmull_lane_s32_dual(in0, c, lane1, s1); \
76 vmlal_lane_s32_dual(in1, c, lane1, s0); \
/external/u-boot/arch/arm/dts/
Dzynqmp-zc1232-revA.dts82 phys = <&lane0 PHY_TYPE_SATA 0 0 125000000>, <&lane1 PHY_TYPE_SATA 1 1 125000000>;
Dzynqmp.dtsi680 lane1: lane1 { label