| /external/capstone/suite/MC/ARM/ |
| D | arm-memory-instructions.s.cs | 58 0xd0,0x30,0xd4,0xe1 = ldrsb r3, [r4]
59 0xd1,0x21,0xd7,0xe1 = ldrsb r2, [r7, #17]
60 0xdf,0x1f,0xf8,0xe1 = ldrsb r1, [r8, #255]!
61 0xd9,0xc0,0xdd,0xe0 = ldrsb r12, [sp], #9
62 0xd4,0x60,0x95,0xe1 = ldrsb r6, [r5, r4]
63 0xdb,0x30,0xb8,0xe1 = ldrsb r3, [r8, r11]!
64 0xd1,0x10,0x32,0xe1 = ldrsb r1, [r2, -r1]!
65 0xd2,0x90,0x97,0xe0 = ldrsb r9, [r7], r2
66 0xd2,0x40,0x13,0xe0 = ldrsb r4, [r3], -r2
|
| D | basic-thumb2-instructions.s.cs | 290 0x1f,0xf9,0x00,0xb0 = ldrsb.w r11, [pc, #-0]
357 0x15,0xf9,0x04,0x5c = ldrsb r5, [r5, #-4]
358 0x96,0xf9,0x20,0x50 = ldrsb.w r5, [r6, #32]
359 0x96,0xf9,0x21,0x50 = ldrsb.w r5, [r6, #33]
360 0x96,0xf9,0x01,0x51 = ldrsb.w r5, [r6, #257]
361 0x97,0xf9,0x01,0xe1 = ldrsb.w lr, [r7, #257]
362 0x18,0xf9,0x01,0x10 = ldrsb.w r1, [r8, r1]
363 0x15,0xf9,0x02,0x40 = ldrsb.w r4, [r5, r2]
364 0x10,0xf9,0x32,0x60 = ldrsb.w r6, [r0, r2, lsl #3]
365 0x18,0xf9,0x22,0x80 = ldrsb.w r8, [r8, r2, lsl #2]
[all …]
|
| /external/llvm/test/MC/AArch64/ |
| D | arm64-elf-relocs.s | 92 ldrsb w5, [x7, #:lo12:sym]
93 ldrsb x11, [x13, :lo12:sym]
105 ldrsb w23, [x19, #:dtprel_lo12:sym]
106 ldrsb x17, [x13, :dtprel_lo12_nc:sym]
118 ldrsb w3, [x4, #:tprel_lo12_nc:sym]
119 ldrsb x5, [x6, :tprel_lo12:sym]
|
| D | arm64-tls-relocs.s | 121 ldrsb x29, [x28, #:tprel_lo12_nc:var]
245 ldrsb x29, [x28, #:dtprel_lo12_nc:var]
|
| D | tls-relocs.s | 129 ldrsb x29, [x28, #:dtprel_lo12_nc:var]
331 ldrsb x29, [x28, #:tprel_lo12_nc:var]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | arm64-elf-relocs.s | 96 ldrsb w5, [x7, #:lo12:sym]
97 ldrsb x11, [x13, :lo12:sym]
109 ldrsb w23, [x19, #:dtprel_lo12:sym]
110 ldrsb x17, [x13, :dtprel_lo12_nc:sym]
122 ldrsb w3, [x4, #:tprel_lo12_nc:sym]
123 ldrsb x5, [x6, :tprel_lo12:sym]
|
| D | arm32-elf-relocs.s | 93 ldrsb w5, [x7, #:lo12:sym]
94 ldrsb x11, [x13, :lo12:sym]
106 ldrsb w23, [x19, #:dtprel_lo12:sym]
107 ldrsb x17, [x13, :dtprel_lo12_nc:sym]
119 ldrsb w3, [x4, #:tprel_lo12_nc:sym]
120 ldrsb x5, [x6, :tprel_lo12:sym]
|
| D | arm64-tls-relocs.s | 120 ldrsb x29, [x28, #:tprel_lo12_nc:var]
253 ldrsb x29, [x28, #:dtprel_lo12_nc:var]
|
| D | tls-relocs.s | 129 ldrsb x29, [x28, #:dtprel_lo12_nc:var]
331 ldrsb x29, [x28, #:tprel_lo12_nc:var]
|
| /external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
| D | memory-arm-instructions.txt | 194 # CHECK: ldrsb r3, [r4
195 # CHECK: ldrsb r2, [r7, #17
196 # CHECK: ldrsb r1, [r8, #255]!
197 # CHECK: ldrsb r12, [sp], #9
213 # CHECK: ldrsb r6, [r5, r4
214 # CHECK: ldrsb r3, [r8, r11]!
215 # CHECK: ldrsb r1, [r2, -r1]!
216 # CHECK: ldrsb r9, [r7], r2
217 # CHECK: ldrsb r4, [r3], -r2
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | memory-arm-instructions.txt | 194 # CHECK: ldrsb r3, [r4
195 # CHECK: ldrsb r2, [r7, #17
196 # CHECK: ldrsb r1, [r8, #255]!
197 # CHECK: ldrsb r12, [sp], #9
213 # CHECK: ldrsb r6, [r5, r4
214 # CHECK: ldrsb r3, [r8, r11]!
215 # CHECK: ldrsb r1, [r2, -r1]!
216 # CHECK: ldrsb r9, [r7], r2
217 # CHECK: ldrsb r4, [r3], -r2
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | memory-arm-instructions.txt | 194 # CHECK: ldrsb r3, [r4
195 # CHECK: ldrsb r2, [r7, #17
196 # CHECK: ldrsb r1, [r8, #255]!
197 # CHECK: ldrsb r12, [sp], #9
213 # CHECK: ldrsb r6, [r5, r4
214 # CHECK: ldrsb r3, [r8, r11]!
215 # CHECK: ldrsb r1, [r2, -r1]!
216 # CHECK: ldrsb r9, [r7], r2
217 # CHECK: ldrsb r4, [r3], -r2
|
| /external/llvm/test/CodeGen/ARM/ |
| D | trunc_ldr.ll | 28 ; CHECK: ldrsb{{.*}}7
29 ; CHECK-NOT: ldrsb{{.*}}7
|
| D | load.ll | 8 ; CHECK: ldrsb r0, [r0, r1]
101 ; CHECK-T2: ldrsb.w r0, [r0]
177 ; CHECK-T1: ldrsb r0, [r0, r1]
178 ; CHECK-T2: ldrsb.w r0, [r0, #31]
262 ; CHECK-T1: ldrsb r0, [r0, r1]
263 ; CHECK-T2: ldrsb.w r0, [r0, #32]
359 ; CHECK-T1: ldrsb r0, [r0, r1]
360 ; CHECK-T2: ldrsb.w r0, [r0, #4095]
463 ; CHECK: ldrsb r0, [r0, r1]
|
| D | fast-isel-ldrh-strh-arm.ll | 128 ; ARM: ldrsb r0, [r0, #-8]
137 ; ARM: ldrsb r0, [r0, #-255]
148 ; ARM: ldrsb r0, [r0]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | trunc_ldr.ll | 28 ; CHECK: ldrsb{{.*}}7
29 ; CHECK-NOT: ldrsb{{.*}}7
|
| D | load.ll | 8 ; CHECK: ldrsb r0, [r0, r1]
101 ; CHECK-T2: ldrsb.w r0, [r0]
177 ; CHECK-T1: ldrsb r0, [r0, r1]
178 ; CHECK-T2: ldrsb.w r0, [r0, #31]
262 ; CHECK-T1: ldrsb r0, [r0, r1]
263 ; CHECK-T2: ldrsb.w r0, [r0, #32]
359 ; CHECK-T1: ldrsb r0, [r0, r1]
360 ; CHECK-T2: ldrsb.w r0, [r0, #4095]
463 ; CHECK: ldrsb r0, [r0, r1]
|
| D | fast-isel-ldrh-strh-arm.ll | 128 ; ARM: ldrsb r0, [r0, #-8]
137 ; ARM: ldrsb r0, [r0, #-255]
148 ; ARM: ldrsb r0, [r0]
|
| /external/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-ldr_ext.ll | 33 ; CHECK: ldrsb
34 ; CHECK-NOT: ldrsb
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-ldr_ext.ll | 33 ; CHECK: ldrsb
34 ; CHECK-NOT: ldrsb
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-abi.ll | 10 ; CHECK-DAG: ldrsb {{w[0-9]+}}, [sp, #5]
11 ; CHECK-DAG: ldrsb {{w[0-9]+}}, [sp, #4]
13 ; CHECK-DAG: ldrsb {{w[0-9]+}}, [sp]
15 ; FAST-DAG: ldrsb {{w[0-9]+}}, [sp, #5]
16 ; FAST-DAG: ldrsb {{w[0-9]+}}, [sp, #4]
18 ; FAST-DAG: ldrsb {{w[0-9]+}}, [sp]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
| D | arm64-abi.ll | 10 ; CHECK-DAG: ldrsb {{w[0-9]+}}, [sp, #5]
11 ; CHECK-DAG: ldrsb {{w[0-9]+}}, [sp, #4]
13 ; CHECK-DAG: ldrsb {{w[0-9]+}}, [sp]
15 ; FAST-DAG: ldrsb {{w[0-9]+}}, [sp, #5]
16 ; FAST-DAG: ldrsb {{w[0-9]+}}, [sp, #4]
18 ; FAST-DAG: ldrsb {{w[0-9]+}}, [sp]
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 837 ldrsb r5, [r5, #-4]
838 ldrsb r5, [r6, #32]
839 ldrsb r5, [r6, #33]
840 ldrsb r5, [r6, #257]
841 ldrsb.w lr, [r7, #257]
843 @ CHECK: ldrsb r5, [r5, #-4] @ encoding: [0x15,0xf9,0x04,0x5c]
844 @ CHECK: ldrsb.w r5, [r6, #32] @ encoding: [0x96,0xf9,0x20,0x50]
845 @ CHECK: ldrsb.w r5, [r6, #33] @ encoding: [0x96,0xf9,0x21,0x50]
846 @ CHECK: ldrsb.w r5, [r6, #257] @ encoding: [0x96,0xf9,0x01,0x51]
847 @ CHECK: ldrsb.w lr, [r7, #257] @ encoding: [0x97,0xf9,0x01,0xe1]
[all …]
|
| /external/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 932 ldrsb r11, [pc, #-0]
938 @ CHECK: ldrsb.w r11, [pc, #-0] @ encoding: [0x1f,0xf9,0x00,0xb0]
1142 ldrsb r5, [r5, #-4]
1143 ldrsb r5, [r6, #32]
1144 ldrsb r5, [r6, #33]
1145 ldrsb r5, [r6, #257]
1146 ldrsb.w lr, [r7, #257]
1148 @ CHECK: ldrsb r5, [r5, #-4] @ encoding: [0x15,0xf9,0x04,0x5c]
1149 @ CHECK: ldrsb.w r5, [r6, #32] @ encoding: [0x96,0xf9,0x20,0x50]
1150 @ CHECK: ldrsb.w r5, [r6, #33] @ encoding: [0x96,0xf9,0x21,0x50]
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | basic-thumb2-instructions.s | 946 ldrsb r11, [pc, #-0]
952 @ CHECK: ldrsb.w r11, [pc, #-0] @ encoding: [0x1f,0xf9,0x00,0xb0]
1156 ldrsb r5, [r5, #-4]
1157 ldrsb r5, [r6, #32]
1158 ldrsb r5, [r6, #33]
1159 ldrsb r5, [r6, #257]
1160 ldrsb.w lr, [r7, #257]
1162 @ CHECK: ldrsb r5, [r5, #-4] @ encoding: [0x15,0xf9,0x04,0x5c]
1163 @ CHECK: ldrsb.w r5, [r6, #32] @ encoding: [0x96,0xf9,0x20,0x50]
1164 @ CHECK: ldrsb.w r5, [r6, #33] @ encoding: [0x96,0xf9,0x21,0x50]
[all …]
|