Searched refs:level_info (Results 1 – 8 of 8) sorted by relevance
565 AV1LevelInfo *const level_info = &cpi->level_info[i]; in av1_update_level_info() local566 AV1LevelStats *const level_stats = &level_info->level_stats; in av1_update_level_info()586 AV1LevelSpec *const level_spec = &level_info->level_spec; in av1_update_level_info()632 const AV1LevelInfo *const level_info = &cpi->level_info[op]; in av1_get_seq_level_idx() local633 const AV1LevelStats *const level_stats = &level_info->level_stats; in av1_get_seq_level_idx()634 const AV1LevelSpec *const level_spec = &level_info->level_spec; in av1_get_seq_level_idx()
2551 static void init_level_info(AV1LevelInfo *level_info) { in init_level_info() argument2552 memset(level_info, 0, MAX_NUM_OPERATING_POINTS * sizeof(*level_info)); in init_level_info()2554 AV1LevelSpec *const level_spec = &level_info[i].level_spec; in init_level_info()2556 AV1LevelStats *const level_stats = &level_info[i].level_stats; in init_level_info()2627 init_level_info(cpi->level_info); in av1_create_compressor()
996 AV1LevelInfo level_info[MAX_NUM_OPERATING_POINTS]; member
3121 const struct legacy_surf_level *level_info = &surf->u.legacy.level[iview->base_mip]; in radv_initialise_color_surface() local3124 cb->cb_color_base += level_info->offset >> 8; in radv_initialise_color_surface()3125 if (level_info->mode == RADEON_SURF_MODE_2D) in radv_initialise_color_surface()3128 pitch_tile_max = level_info->nblk_x / 8 - 1; in radv_initialise_color_surface()3129 slice_tile_max = (level_info->nblk_x * level_info->nblk_y) / 64 - 1; in radv_initialise_color_surface()3383 const struct legacy_surf_level *level_info = &iview->image->surface.u.legacy.level[level]; in radv_initialise_ds_surface() local3386 level_info = &iview->image->surface.u.legacy.stencil_level[level]; in radv_initialise_ds_surface()3428 ds->db_depth_size = S_028058_PITCH_TILE_MAX((level_info->nblk_x / 8) - 1) | in radv_initialise_ds_surface()3429 S_028058_HEIGHT_TILE_MAX((level_info->nblk_y / 8) - 1); in radv_initialise_ds_surface()3430 ds->db_depth_slice = S_02805C_SLICE_TILE_MAX((level_info->nblk_x * level_info->nblk_y) / 64 - 1); in radv_initialise_ds_surface()
3067 const struct legacy_surf_level *level_info = in si_emit_framebuffer_state() local3072 cb_color_base += level_info->offset >> 8; in si_emit_framebuffer_state()3074 if (level_info->mode == RADEON_SURF_MODE_2D) in si_emit_framebuffer_state()3080 cb_dcc_base += level_info->dcc_offset >> 8; in si_emit_framebuffer_state()3082 pitch_tile_max = level_info->nblk_x / 8 - 1; in si_emit_framebuffer_state()3083 slice_tile_max = level_info->nblk_x * in si_emit_framebuffer_state()3084 level_info->nblk_y / 64 - 1; in si_emit_framebuffer_state()
814 Vp9LevelInfo level_info; member
625 static void init_level_info(Vp9LevelInfo *level_info) { in init_level_info() argument626 Vp9LevelStats *const level_stats = &level_info->level_stats; in init_level_info()627 Vp9LevelSpec *const level_spec = &level_info->level_spec; in init_level_info()2207 init_level_info(&cpi->level_info); in vp9_create_compressor()5200 Vp9LevelInfo *const level_info = &cpi->level_info; local5201 Vp9LevelSpec *const level_spec = &level_info->level_spec;5202 Vp9LevelStats *const level_stats = &level_info->level_stats;
887 *arg = (int)vp9_get_level(&ctx->cpi->level_info.level_spec); in ctrl_get_level()