| /external/llvm/test/CodeGen/SystemZ/ |
| D | fp-move-09.ll | 23 ; CHECK: lgdr [[REG:%r[0-5]]], %f0
37 ; CHECK: lgdr [[REG:%r[0-5]]], %f0
53 ; CHECK: lgdr [[REG:%r[0-5]]], %f0
|
| D | fp-move-02.ll | 84 ; CHECK: lgdr [[REGISTER:%r[0-5]]], %f0
93 ; CHECK: lgdr %r2, %f0
|
| D | vec-move-04.ll | 164 ; CHECK: lgdr [[REG:%r[0-5]]], %f0
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/ |
| D | fp-move-09.ll | 23 ; CHECK: lgdr [[REG:%r[0-5]]], %f0
37 ; CHECK: lgdr [[REG:%r[0-5]]], %f0
53 ; CHECK: lgdr [[REG:%r[0-5]]], %f0
|
| D | fp-move-02.ll | 84 ; CHECK: lgdr [[REGISTER:%r[0-5]]], %f0
93 ; CHECK: lgdr %r2, %f0
|
| D | vec-move-04.ll | 164 ; CHECK: lgdr [[REG:%r[0-5]]], %f0
|
| /external/capstone/suite/MC/SystemZ/ |
| D | insn-good.s.cs | 926 0xb3,0xcd,0x00,0x00 = lgdr %r0, %f0
927 0xb3,0xcd,0x00,0x0f = lgdr %r0, %f15
928 0xb3,0xcd,0x00,0xf0 = lgdr %r15, %f0
929 0xb3,0xcd,0x00,0x88 = lgdr %r8, %f8
930 0xb3,0xcd,0x00,0xff = lgdr %r15, %f15
|
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZInstrFP.td | 306 "lgdr\t{$dst, $src}",
|
| /external/v8/src/compiler/s390/ |
| D | code-generator-s390.cc | 2389 __ lgdr(i.OutputRegister(), i.InputDoubleRegister(0)); in AssembleArchInstruction() local
2393 __ lgdr(i.OutputRegister(), i.InputDoubleRegister(0)); in AssembleArchInstruction() local
2397 __ lgdr(kScratchReg, i.InputDoubleRegister(0)); in AssembleArchInstruction() local
2403 __ lgdr(r0, i.InputDoubleRegister(0)); in AssembleArchInstruction() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrFP.td | 85 def LGDR : UnaryRRE<"lgdr", 0xB3CD, bitconvert, GR64, FP64>;
|
| /external/llvm/test/MC/SystemZ/ |
| D | insn-good.s | 5992 #CHECK: lgdr %r0, %f0 # encoding: [0xb3,0xcd,0x00,0x00]
5993 #CHECK: lgdr %r0, %f15 # encoding: [0xb3,0xcd,0x00,0x0f]
5994 #CHECK: lgdr %r15, %f0 # encoding: [0xb3,0xcd,0x00,0xf0]
5995 #CHECK: lgdr %r8, %f8 # encoding: [0xb3,0xcd,0x00,0x88]
5996 #CHECK: lgdr %r15, %f15 # encoding: [0xb3,0xcd,0x00,0xff]
5998 lgdr %r0,%f0
5999 lgdr %r0,%f15
6000 lgdr %r15,%f0
6001 lgdr %r8,%f8
6002 lgdr %r15,%f15
|
| /external/v8/src/s390/ |
| D | macro-assembler-s390.cc | 997 lgdr(dst, src); in MovDoubleToInt64()
2865 lgdr(dst, src); in MovFloatToInt()
|
| D | constants-s390.h | 1323 V(lgdr, LGDR, 0xB3CD) /* type = RRE LOAD GR FROM FPR (long to 64) */ \
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/SystemZ/ |
| D | insn-good.s | 8735 #CHECK: lgdr %r0, %f0 # encoding: [0xb3,0xcd,0x00,0x00]
8736 #CHECK: lgdr %r0, %f15 # encoding: [0xb3,0xcd,0x00,0x0f]
8737 #CHECK: lgdr %r15, %f0 # encoding: [0xb3,0xcd,0x00,0xf0]
8738 #CHECK: lgdr %r8, %f8 # encoding: [0xb3,0xcd,0x00,0x88]
8739 #CHECK: lgdr %r15, %f15 # encoding: [0xb3,0xcd,0x00,0xff]
8741 lgdr %r0,%f0
8742 lgdr %r0,%f15
8743 lgdr %r15,%f0
8744 lgdr %r8,%f8
8745 lgdr %r15,%f15
|
| /external/llvm/test/MC/Disassembler/SystemZ/ |
| D | insns.txt | 4411 # CHECK: lgdr %r0, %f0
4414 # CHECK: lgdr %r0, %f15
4417 # CHECK: lgdr %r15, %f0
4420 # CHECK: lgdr %r8, %f8
4423 # CHECK: lgdr %r15, %f15
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/SystemZ/ |
| D | insns.txt | 8712 # CHECK: lgdr %r0, %f0
8715 # CHECK: lgdr %r0, %f15
8718 # CHECK: lgdr %r15, %f0
8721 # CHECK: lgdr %r8, %f8
8724 # CHECK: lgdr %r15, %f15
|