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Searched refs:llcr (Results 1 – 23 of 23) sorted by relevance

/external/llvm/test/CodeGen/SystemZ/
Dcmpxchg-05.ll7 ; CHECK-NOT: llcr
10 ; CHECK-NOT: llcr
33 ; CHECK-NOT: llcr
36 ; CHECK-NOT: llcr
59 ; CHECK: llcr [[REG:%r[0-9]+]], [[RES:%r[0-9]+]]
70 ; CHECK: llcr [[REG:%r[0-9]+]], [[RES:%r[0-9]+]]
Dmemchr-01.ll12 ; CHECK-DAG: llcr %r0, %r3
Dint-conv-02.ll9 ; CHECK: llcr %r2, %r2
19 ; CHECK: llcr %r2, %r2
29 ; CHECK: llcr %r2, %r2
Dmemchr-02.ll11 ; CHECK-DAG: llcr %r0, %r4
Dctpop-01.ll37 ; CHECK: llcr %r0, %r2
Dinsert-05.ll217 ; CHECK: llcr %r2, %r2
Dasm-18.ll201 ; CHECK-DAG: llcr [[REG2:%r[0-5]]], %r3
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/
Dcmpxchg-05.ll7 ; CHECK-NOT: llcr
10 ; CHECK-NOT: llcr
33 ; CHECK-NOT: llcr
36 ; CHECK-NOT: llcr
Dint-conv-02.ll9 ; CHECK: llcr %r2, %r2
19 ; CHECK: llcr %r2, %r2
29 ; CHECK: llcr %r2, %r2
Dmemchr-01.ll11 ; CHECK-DAG: llcr %r0, %r4
Dctpop-01.ll37 ; CHECK: llcr %r0, %r2
Dasm-18.ll201 ; CHECK-DAG: llcr [[REG2:%r[0-5]]], %r3
/external/capstone/suite/MC/SystemZ/
Dinsn-good.s.cs1009 0xb9,0x94,0x00,0x0f = llcr %r0, %r15
1010 0xb9,0x94,0x00,0x78 = llcr %r7, %r8
1011 0xb9,0x94,0x00,0xf0 = llcr %r15, %r0
/external/u-boot/arch/powerpc/include/asm/
Dimmap_86xx.h897 uint llcr; /* 0xd0004 - Logical Layer Configuration Register */ member
Dimmap_85xx.h1327 u32 llcr; /* Logical Layer Configuration Register */ member
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.td621 def LLCRMux : UnaryRRPseudo<"llcr", zext8, GRX32, GRX32>,
623 def LLCR : UnaryRRE<"llcr", 0xB994, zext8, GR32, GR32>;
/external/v8/src/s390/
Dconstants-s390.h1422 V(llcr, LLCR, 0xB994) /* type = RRE LOAD LOGICAL CHARACTER (32<-8) */ \
Dmacro-assembler-s390.cc3827 llcr(dst, src); in LoadlB()
/external/llvm/test/MC/SystemZ/
Dinsn-good.s6334 #CHECK: llcr %r0, %r15 # encoding: [0xb9,0x94,0x00,0x0f]
6335 #CHECK: llcr %r7, %r8 # encoding: [0xb9,0x94,0x00,0x78]
6336 #CHECK: llcr %r15, %r0 # encoding: [0xb9,0x94,0x00,0xf0]
6338 llcr %r0, %r15
6339 llcr %r7, %r8
6340 llcr %r15, %r0
/external/v8/src/compiler/s390/
Dcode-generator-s390.cc2636 __ llcr(output, output); in AssembleArchInstruction() local
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/SystemZ/
Dinsn-good.s9077 #CHECK: llcr %r0, %r15 # encoding: [0xb9,0x94,0x00,0x0f]
9078 #CHECK: llcr %r7, %r8 # encoding: [0xb9,0x94,0x00,0x78]
9079 #CHECK: llcr %r15, %r0 # encoding: [0xb9,0x94,0x00,0xf0]
9081 llcr %r0, %r15
9082 llcr %r7, %r8
9083 llcr %r15, %r0
/external/llvm/test/MC/Disassembler/SystemZ/
Dinsns.txt4690 # CHECK: llcr %r0, %r15
4693 # CHECK: llcr %r7, %r8
4696 # CHECK: llcr %r15, %r0
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/SystemZ/
Dinsns.txt9021 # CHECK: llcr %r0, %r15
9024 # CHECK: llcr %r7, %r8
9027 # CHECK: llcr %r15, %r0