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Searched refs:lwre (Results 1 – 25 of 28) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/eva/
Dvalid_preR6.s35 … lwre $zero,255($gp) # CHECK: lwre $zero, 255($gp) # encoding: [0x7f,0x80,0x7f,0x9a]
36 … lwre $zero,-256($gp) # CHECK: lwre $zero, -256($gp) # encoding: [0x7f,0x80,0x80,0x1a]
37 … lwre $zero,-176($gp) # CHECK: lwre $zero, -176($gp) # encoding: [0x7f,0x80,0xa8,0x1a]
Dinvalid_R6.s12 …lwre $zero,255($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
13 …lwre $zero,-256($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
14 …lwre $zero,-176($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
Dinvalid-noeva-wrong-error.s46 …lwre $zero,255($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
47 …lwre $zero,-256($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
48 …lwre $zero,-176($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruct…
/external/llvm/test/MC/Mips/eva/
Dvalid_preR6.s35 … lwre $zero,255($gp) # CHECK: lwre $zero, 255($gp) # encoding: [0x7f,0x80,0x7f,0x9a]
36 … lwre $zero,-256($gp) # CHECK: lwre $zero, -256($gp) # encoding: [0x7f,0x80,0x80,0x1a]
37 … lwre $zero,-176($gp) # CHECK: lwre $zero, -176($gp) # encoding: [0x7f,0x80,0xa8,0x1a]
Dinvalid_R6.s12 …lwre $zero,255($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit sig…
13 …lwre $zero,-256($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit sig…
14 …lwre $zero,-176($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit sig…
Dinvalid-noeva-wrong-error.s46 …lwre $zero,255($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s…
47 …lwre $zero,-256($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s…
48 …lwre $zero,-176($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit s…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/
Dmicromips-eva.s24 # CHECK-EL: lwre $24, 5($3) # encoding: [0x03,0x63,0x05,0x66]
59 # CHECK-EB: lwre $24, 5($3) # encoding: [0x63,0x03,0x66,0x05]
86 lwre $24, 5($3)
/external/llvm/test/MC/Disassembler/Mips/eva/
Dvalid_preR6-eva.txt29 0x7f 0x80 0x7f 0x9a # CHECK: lwre $zero, 255($gp)
30 0x7f 0x80 0x80 0x1a # CHECK: lwre $zero, -256($gp)
31 0x7f 0x80 0xa8 0x1a # CHECK: lwre $zero, -176($gp)
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/eva/
Dvalid_preR6-eva.txt29 0x7f 0x80 0x7f 0x9a # CHECK: lwre $zero, 255($gp)
30 0x7f 0x80 0x80 0x1a # CHECK: lwre $zero, -256($gp)
31 0x7f 0x80 0xa8 0x1a # CHECK: lwre $zero, -176($gp)
/external/llvm/test/MC/Mips/
Dmicromips-control-instructions.s47 # CHECK-EL: lwre $24, 5($3) # encoding: [0x03,0x63,0x05,0x66]
89 # CHECK-EB: lwre $24, 5($3) # encoding: [0x63,0x03,0x66,0x05]
126 lwre $24, 5($3)
/external/llvm/test/MC/Mips/mips64r6/
Dinvalid-mips1-wrong-error.s15 …lwre $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit si…
Dinvalid-mips3-wrong-error.s21 …lwre $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit si…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r6/
Dinvalid-mips1-wrong-error.s15 …lwre $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
Dinvalid-mips3-wrong-error.s21 …lwre $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r6/
Dinvalid-mips1-wrong-error.s15 …lwre $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instructi…
/external/llvm/test/MC/Mips/mips32r6/
Dinvalid-mips1-wrong-error.s15 …lwre $zero,-19147($gp) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: expected memory with 9-bit si…
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/
Dunaligned-memops-mapping.mir122 # CHECK: 18: 60 24 66 03 lwre $1, 3($4)
/external/llvm/lib/Target/Mips/
DMipsEVAInstrInfo.td102 class LWRE_DESC : LOAD_LEFT_RIGHT_EVA_DESC_BASE<"lwre", GPR32Opnd, II_LWRE>;
DMicroMipsInstrInfo.td796 def LWRE_MM : LoadLeftRightMM<"lwre", MipsLWR, GPR32Opnd, mem_mm_9>,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsEVAInstrInfo.td107 class LWRE_DESC : LOAD_LEFT_RIGHT_EVA_DESC_BASE<"lwre", GPR32Opnd, II_LWRE>;
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips/
Dvalid.s298 lwre $24, 5($3) # CHECK: lwre $24, 5($3) # encoding: [0x63,0x03,0x66,0x05] label
/external/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid-el.txt186 0x03 0x63 0x05 0x66 # CHECK: lwre $24, 5($3)
Dvalid.txt186 0x63 0x03 0x66 0x05 # CHECK: lwre $24, 5($3)
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/micromips32r3/
Dvalid-el.txt203 0x03 0x63 0x05 0x66 # CHECK: lwre $24, 5($3)
Dvalid.txt203 0x63 0x03 0x66 0x05 # CHECK: lwre $24, 5($3)

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