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Searched refs:lwupc (Results 1 – 17 of 17) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r6/
Drelocations.s43 # CHECK-FIXUP: lwupc $2, bar # encoding: [0xec,0b01010AAA,A,A]
75 lwupc $2,bar
/external/llvm/test/MC/Mips/mips32r6/
Drelocations.s40 # CHECK-FIXUP: lwupc $2, bar # encoding: [0xec,0b01010AAA,A,A]
70 lwupc $2,bar
/external/llvm/test/MC/Mips/mips64r6/
Drelocations.s44 # CHECK-FIXUP: lwupc $2, bar # encoding: [0xec,0b01010AAA,A,A]
76 lwupc $2,bar
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r6/
Drelocations.s47 # CHECK-FIXUP: lwupc $2, bar # encoding: [0xec,0b01010AAA,A,A]
81 lwupc $2,bar
/external/llvm/test/MC/Disassembler/Mips/mips32r6/
Dvalid-mips32r6-el.txt98 0x43 0x00 0x50 0xec # CHECK: lwupc $2, 268
Dvalid-mips32r6.txt185 0xec 0x50 0x00 0x43 # CHECK: lwupc $2, 268
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips32r6/
Dvalid-mips32r6-el.txt103 0x43 0x00 0x50 0xec # CHECK: lwupc $2, 268
Dvalid-mips32r6.txt195 0xec 0x50 0x00 0x43 # CHECK: lwupc $2, 268
/external/llvm/test/MC/Disassembler/Mips/mips64r6/
Dvalid-mips64r6-el.txt134 0x43 0x00 0x50 0xec # CHECK: lwupc $2, 268
Dvalid-mips64r6.txt209 0xec 0x50 0x00 0x43 # CHECK: lwupc $2, 268
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/mips64r6/
Dvalid-mips64r6-el.txt140 0x43 0x00 0x50 0xec # CHECK: lwupc $2, 268
Dvalid-mips64r6.txt219 0xec 0x50 0x00 0x43 # CHECK: lwupc $2, 268
/external/llvm/lib/Target/Mips/
DMips32r6InstrInfo.td288 class LWUPC_DESC: PCREL_DESC_BASE<"lwupc", GPR32Opnd, simm19_lsl2, II_LWUPC>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMips32r6InstrInfo.td327 class LWUPC_DESC: PCREL_DESC_BASE<"lwupc", GPR32Opnd, simm19_lsl2, II_LWUPC>;
/external/v8/src/mips64/
Dassembler-mips64.h944 void lwupc(Register rs, int32_t offset19);
Dassembler-mips64.cc2585 void Assembler::lwupc(Register rs, int32_t offset19) { in lwupc() function in v8::internal::Assembler
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenAsmMatcher.inc4942 "lwu\005lwupc\003lwx\005lwxc1\004lwxs\004madd\006madd.d\006madd.s\010mad"
6536 …{ 5651 /* lwupc */, Mips::LWUPC, Convert__GPR32AsmReg1_0__Simm19_Lsl21_1, Feature_HasStdEnc|Featur…
9840 …{ Feature_HasStdEnc|Feature_HasMips32r6|Feature_NotInMicroMips, 5651 /* lwupc */, MCK_GPR32AsmReg,…