Searched refs:markSuperRegs (Results 1 – 8 of 8) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/ |
| D | RISCVRegisterInfo.cpp | 50 markSuperRegs(Reserved, RISCV::X0); // zero in getReservedRegs()
51 markSuperRegs(Reserved, RISCV::X1); // ra in getReservedRegs()
52 markSuperRegs(Reserved, RISCV::X2); // sp in getReservedRegs()
53 markSuperRegs(Reserved, RISCV::X3); // gp in getReservedRegs()
54 markSuperRegs(Reserved, RISCV::X4); // tp in getReservedRegs()
55 markSuperRegs(Reserved, RISCV::X8); // fp in getReservedRegs()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.cpp | 255 markSuperRegs(Reserved, PPC::ZERO); in getReservedRegs()
259 markSuperRegs(Reserved, PPC::FP); in getReservedRegs()
263 markSuperRegs(Reserved, PPC::BP); in getReservedRegs()
267 markSuperRegs(Reserved, PPC::CTR); in getReservedRegs()
268 markSuperRegs(Reserved, PPC::CTR8); in getReservedRegs()
270 markSuperRegs(Reserved, PPC::R1); in getReservedRegs()
271 markSuperRegs(Reserved, PPC::LR); in getReservedRegs()
272 markSuperRegs(Reserved, PPC::LR8); in getReservedRegs()
273 markSuperRegs(Reserved, PPC::RM); in getReservedRegs()
276 markSuperRegs(Reserved, PPC::VRSAVE); in getReservedRegs()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64RegisterInfo.cpp | 144 markSuperRegs(Reserved, AArch64::WSP); in getReservedRegs()
145 markSuperRegs(Reserved, AArch64::WZR); in getReservedRegs()
148 markSuperRegs(Reserved, AArch64::W29); in getReservedRegs()
151 markSuperRegs(Reserved, AArch64::W18); // Platform register in getReservedRegs()
154 markSuperRegs(Reserved, AArch64::W20); // Platform register in getReservedRegs()
157 markSuperRegs(Reserved, AArch64::W19); in getReservedRegs()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMBaseRegisterInfo.cpp | 185 markSuperRegs(Reserved, ARM::SP); in getReservedRegs()
186 markSuperRegs(Reserved, ARM::PC); in getReservedRegs()
187 markSuperRegs(Reserved, ARM::FPSCR); in getReservedRegs()
188 markSuperRegs(Reserved, ARM::APSR_NZCV); in getReservedRegs()
190 markSuperRegs(Reserved, getFramePointerReg(STI)); in getReservedRegs()
192 markSuperRegs(Reserved, BasePtr); in getReservedRegs()
195 markSuperRegs(Reserved, ARM::R9); in getReservedRegs()
200 markSuperRegs(Reserved, ARM::D16 + R); in getReservedRegs()
206 markSuperRegs(Reserved, Reg); in getReservedRegs()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/ |
| D | BPFRegisterInfo.cpp | 40 markSuperRegs(Reserved, BPF::W10); // [W|R]10 is read only frame pointer in getReservedRegs()
41 markSuperRegs(Reserved, BPF::W11); // [W|R]11 is pseudo stack pointer in getReservedRegs()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonRegisterInfo.cpp | 186 markSuperRegs(Reserved, x); in getReservedRegs()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 58 void TargetRegisterInfo::markSuperRegs(BitVector &RegisterSet, unsigned Reg) in markSuperRegs() function in TargetRegisterInfo
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | TargetRegisterInfo.h | 992 void markSuperRegs(BitVector &RegisterSet, unsigned Reg) const;
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