Searched refs:matchHalf (Results 1 – 2 of 2) sorted by relevance
| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonBitSimplify.cpp | 1670 bool matchHalf(unsigned SelfR, const BitTracker::RegisterCell &RC,
1700 bool BitSimplification::matchHalf(unsigned SelfR, in matchHalf() function in BitSimplification
1786 if (!matchHalf(SelfR, RC, 0, L2) || !matchHalf(SelfR, RC, 16, L1)) in matchPackhl()
1788 if (!matchHalf(SelfR, RC, 32, H2) || !matchHalf(SelfR, RC, 48, H1)) in matchPackhl()
1825 if (!matchHalf(0, RC, 0, H)) in genStoreUpperHalf()
1938 if (!matchHalf(RD.Reg, RC, 0, L) || !HBS::isZero(RC, 16, 16)) in genExtractHalf()
1974 if (!matchHalf(RD.Reg, RC, 0, L) || !matchHalf(RD.Reg, RC, 16, H)) in genCombineHalf()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonBitSimplify.cpp | 1756 bool matchHalf(unsigned SelfR, const BitTracker::RegisterCell &RC,
1799 bool BitSimplification::matchHalf(unsigned SelfR, in matchHalf() function in BitSimplification
1891 if (!matchHalf(SelfR, RC, 0, L2) || !matchHalf(SelfR, RC, 16, L1)) in matchPackhl()
1893 if (!matchHalf(SelfR, RC, 32, H2) || !matchHalf(SelfR, RC, 48, H1)) in matchPackhl()
1928 if (!matchHalf(0, RC, 0, H)) in genStoreUpperHalf()
2043 if (!matchHalf(RD.Reg, RC, 0, L) || !HBS::isZero(RC, 16, 16)) in genExtractHalf()
2082 if (!matchHalf(RD.Reg, RC, 0, L) || !matchHalf(RD.Reg, RC, 16, H)) in genCombineHalf()
|