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Searched refs:max_dw (Results 1 – 12 of 12) sorted by relevance

/external/mesa3d/src/amd/vulkan/
Dradv_cs.h37 if (cs->max_dw - cs->cdw < needed) in radeon_check_space()
45 assert(cs->cdw + 2 + num <= cs->max_dw); in radeon_set_config_reg_seq()
60 assert(cs->cdw + 2 + num <= cs->max_dw); in radeon_set_context_reg_seq()
78 assert(cs->cdw + 3 <= cs->max_dw); in radeon_set_context_reg_idx()
87 assert(cs->cdw + 2 + num <= cs->max_dw); in radeon_set_sh_reg_seq()
102 assert(cs->cdw + 2 + num <= cs->max_dw); in radeon_set_uconfig_reg_seq()
119 assert(cs->cdw + 3 <= cs->max_dw); in radeon_set_uconfig_reg_idx()
Dradv_radeon_winsys.h99 unsigned max_dw; /* Maximum number of dwords. */ member
/external/mesa3d/src/gallium/drivers/radeon/
Dr600_cs.h117 assert(cs->current.cdw + 2 + num <= cs->current.max_dw); in radeon_set_config_reg_seq()
131 assert(cs->current.cdw + 2 + num <= cs->current.max_dw); in radeon_set_context_reg_seq()
147 assert(cs->current.cdw + 3 <= cs->current.max_dw); in radeon_set_context_reg_idx()
156 assert(cs->current.cdw + 2 + num <= cs->current.max_dw); in radeon_set_sh_reg_seq()
170 assert(cs->current.cdw + 2 + num <= cs->current.max_dw); in radeon_set_uconfig_reg_seq()
186 assert(cs->current.cdw + 3 <= cs->current.max_dw); in radeon_set_uconfig_reg_idx()
Dradeon_winsys.h166 unsigned max_dw; /* Maximum number of dwords. */ member
Dr600_pipe_common.c211 assert((num_dw + ctx->dma.cs->current.cdw) <= ctx->dma.cs->current.max_dw); in si_need_dma_space()
/external/mesa3d/src/gallium/drivers/r600/
Dr600_cs.h134 assert(cs->current.cdw + 2 + num <= cs->current.max_dw); in radeon_set_config_reg_seq()
148 assert(cs->current.cdw + 2 + num <= cs->current.max_dw); in radeon_set_context_reg_seq()
164 assert(cs->current.cdw + 3 <= cs->current.max_dw); in radeon_set_context_reg_idx()
173 assert(cs->current.cdw + 2 + num <= cs->current.max_dw); in radeon_set_sh_reg_seq()
187 assert(cs->current.cdw + 2 + num <= cs->current.max_dw); in radeon_set_uconfig_reg_seq()
203 assert(cs->current.cdw + 3 <= cs->current.max_dw); in radeon_set_uconfig_reg_idx()
Dr600_pipe.h609 assert(cs->current.cdw + cb->num_dw <= cs->current.max_dw); in r600_emit_command_buffer()
976 assert(cs->current.cdw + 2 + num <= cs->current.max_dw); in radeon_set_ctl_const_seq()
Dr600_pipe_common.c292 assert((num_dw + ctx->dma.cs->current.cdw) <= ctx->dma.cs->current.max_dw); in r600_need_dma_space()
/external/mesa3d/src/amd/vulkan/winsys/amdgpu/
Dradv_amdgpu_cs.c230 cs->base.max_dw = ib_size / 4 - 4; in radv_amdgpu_cs_create()
237 cs->base.max_dw = 4096; in radv_amdgpu_cs_create()
259 MIN2(cs->base.max_dw * 2, limit_dws)); in radv_amdgpu_cs_grow()
287 cs->old_cs_buffers[cs->num_old_cs_buffers].max_dw = cs->base.max_dw; in radv_amdgpu_cs_grow()
297 MIN2(cs->base.max_dw * 2, limit_dws)); in radv_amdgpu_cs_grow()
309 cs->base.max_dw = ib_dws; in radv_amdgpu_cs_grow()
317 uint64_t ib_size = MAX2(min_size * 4 + 16, cs->base.max_dw * 4 * 2); in radv_amdgpu_cs_grow()
365 cs->base.max_dw = ib_size / 4 - 4; in radv_amdgpu_cs_grow()
555 if (parent->base.cdw + 4 > parent->base.max_dw) in radv_amdgpu_cs_execute_secondary()
563 if (parent->base.cdw + child->base.cdw > parent->base.max_dw) in radv_amdgpu_cs_execute_secondary()
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/external/mesa3d/src/gallium/winsys/amdgpu/drm/
Damdgpu_cs.c763 ib->base.current.max_dw = ib_size / 4 - amdgpu_cs_epilog_dws(cs->ring_type); in amdgpu_get_new_ib()
933 assert(rcs->current.cdw <= rcs->current.max_dw); in amdgpu_cs_check_space()
940 if (rcs->current.max_dw - rcs->current.cdw >= dw) in amdgpu_cs_check_space()
968 rcs->current.max_dw += 4; in amdgpu_cs_check_space()
969 assert(ib->used_ib_space + 4 * rcs->current.max_dw <= ib->big_ib_buffer->size); in amdgpu_cs_check_space()
982 assert(rcs->current.cdw <= rcs->current.max_dw); in amdgpu_cs_check_space()
991 rcs->prev[rcs->num_prev].max_dw = rcs->current.cdw; /* no modifications */ in amdgpu_cs_check_space()
998 ib->base.current.max_dw = ib->big_ib_buffer->size / 4 - amdgpu_cs_epilog_dws(cs->ring_type); in amdgpu_cs_check_space()
1433 rcs->current.max_dw += amdgpu_cs_epilog_dws(cs->ring_type); in amdgpu_cs_flush()
1469 if (rcs->current.cdw > rcs->current.max_dw) { in amdgpu_cs_flush()
[all …]
/external/mesa3d/src/gallium/winsys/radeon/drm/
Dradeon_drm_cs.c182 cs->base.current.max_dw = ARRAY_SIZE(cs->csc->buf); in radeon_drm_cs_create()
427 assert(rcs->current.cdw <= rcs->current.max_dw); in radeon_drm_cs_check_space()
428 return rcs->current.max_dw - rcs->current.cdw >= dw; in radeon_drm_cs_check_space()
581 if (rcs->current.cdw > rcs->current.max_dw) { in radeon_drm_cs_flush()
621 …if (cs->base.current.cdw && cs->base.current.cdw <= cs->base.current.max_dw && !debug_get_option_n… in radeon_drm_cs_flush()
/external/mesa3d/src/gallium/drivers/r300/
Dr300_cs.h49 assert(size <= (cs_copy->current.max_dw - cs_copy->current.cdw)); \