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Searched refs:max_mb_address (Results 1 – 3 of 3) sorted by relevance

/external/mesa3d/src/gallium/drivers/radeon/
Dradeon_vcn_dec.c381 unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size; in calc_ctx_size_h265_main10() local
404 max_mb_address = (unsigned) ceil(height * 8 / 2048.0); in calc_ctx_size_h265_main10()
407 db_left_tile_pxl_size = coeff_10bit * (max_mb_address * 2 * 2048 + 1024); in calc_ctx_size_h265_main10()
Dradeon_uvd.c302 unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size; in calc_ctx_size_h265_main10() local
324 max_mb_address = (unsigned) ceil(height * 8 / 2048.0); in calc_ctx_size_h265_main10()
327 db_left_tile_pxl_size = coeff_10bit * (max_mb_address * 2 * 2048 + 1024); in calc_ctx_size_h265_main10()
/external/mesa3d/src/gallium/drivers/r600/
Dradeon_uvd.c251 unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size; in calc_ctx_size_h265_main10() local
273 max_mb_address = (unsigned) ceil(height * 8 / 2048.0); in calc_ctx_size_h265_main10()
276 db_left_tile_pxl_size = coeff_10bit * (max_mb_address * 2 * 2048 + 1024); in calc_ctx_size_h265_main10()