Home
last modified time | relevance | path

Searched refs:mbus0_clk_cfg (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/arm/mach-sunxi/
Ddram_sunxi_dw.c371 clrbits_le32(&ccm->mbus0_clk_cfg, MBUS_CLK_GATE); in mctl_sys_init()
405 setbits_le32(&ccm->mbus0_clk_cfg, MBUS_CLK_GATE); in mctl_sys_init()
Dclock_sun6i.c50 writel(MBUS_CLK_DEFAULT, &ccm->mbus0_clk_cfg); in clock_init_safe()
Ddram_sun8i_a33.c317 setbits_le32(&ccm->mbus0_clk_cfg, MBUS_CLK_GATE); in mctl_sys_init()
/external/u-boot/arch/arm/include/asm/arch-sunxi/
Dclock_sun6i.h104 u32 mbus0_clk_cfg; /* 0x15c MBUS0 module clock */ member