/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
D | intrinsics.ll | 12 ; CHECK: mcr2 13 tail call void @llvm.arm.mcr2(i32 7, i32 1, i32 %1, i32 1, i32 1, i32 4) nounwind 33 declare void @llvm.arm.mcr2(i32, i32, i32, i32, i32, i32) nounwind
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
D | armv8.2a-dotprod-t32.s | 26 #CHECK-ERROR: mcr2 p13, #1, r0, c1, c2, #0 28 #CHECK-ERROR: mcr2 p13, #1, r0, c2, c4, #2
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D | armv8.2a-dotprod-a32.s | 29 #CHECK-ERROR: mcr2 p13, #1, r0, c1, c2, #0 31 #CHECK-ERROR: mcr2 p13, #1, r0, c2, c4, #2
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D | invalid-thumbv8.txt | 44 # CHECK-V7: mcr2 49 # CHECK-V7: mcr2 54 # CHECK-V7: mcr2
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D | invalid-armv8.txt | 44 # CHECK-V7: mcr2 49 # CHECK-V7: mcr2 54 # CHECK-V7: mcr2
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D | arm-tests.txt | 99 # CHECK: mcr2 p0, #0, r2, c1, c0, #7
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/external/llvm/test/CodeGen/ARM/ |
D | intrinsics-coprocessor.ll | 12 ; CHECK: mcr2 p7, #1, r{{[0-9]+}}, c1, c1, #4 13 tail call void @llvm.arm.mcr2(i32 7, i32 1, i32 %1, i32 1, i32 1, i32 4) nounwind 69 declare void @llvm.arm.mcr2(i32, i32, i32, i32, i32, i32) nounwind
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | intrinsics-coprocessor.ll | 11 ; CHECK: mcr2 p7, #1, r{{[0-9]+}}, c1, c1, #4 12 tail call void @llvm.arm.mcr2(i32 7, i32 1, i32 %1, i32 1, i32 1, i32 4) nounwind 68 declare void @llvm.arm.mcr2(i32, i32, i32, i32, i32, i32) nounwind
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/external/llvm/test/MC/Disassembler/ARM/ |
D | invalid-armv8.txt | 44 # CHECK-V7: mcr2 49 # CHECK-V7: mcr2 54 # CHECK-V7: mcr2
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D | invalid-thumbv8.txt | 44 # CHECK-V7: mcr2 49 # CHECK-V7: mcr2 54 # CHECK-V7: mcr2
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D | arm-tests.txt | 99 # CHECK: mcr2 p0, #0, r2, c1, c0, #7
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/ |
D | intrinsics-coprocessor.ll | 10 ; CHECK: mcr2 p7, #1, r{{[0-9]+}}, c1, c1, #4 11 tail call void @llvm.arm.mcr2(i32 7, i32 1, i32 %1, i32 1, i32 1, i32 4) nounwind 83 declare void @llvm.arm.mcr2(i32, i32, i32, i32, i32, i32) nounwind
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/external/clang/test/CodeGen/ |
D | builtins-arm.c | 179 void mcr2(unsigned a) { in mcr2() function
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/external/swiftshader/third_party/LLVM/test/MC/ARM/ |
D | diagnostics.s | 81 mcr2 p7, #8, r5, c1, c1, #4 82 mcr2 p7, #1, r5, c1, c1, #8
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D | basic-arm-instructions.s | 793 mcr2 p7, #1, r5, c1, c1, #4 796 @ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x91,0x57,0x21,0xfe]
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D | basic-thumb2-instructions.s | 1068 mcr2 p7, #1, r5, c1, c1, #4 1071 @ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x21,0xfe,0x91,0x57]
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/external/swiftshader/third_party/LLVM/test/MC/Disassembler/ARM/ |
D | arm-tests.txt | 75 # CHECK: mcr2 p0, #0, r2, c1, c0, #7
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/external/llvm/test/MC/ARM/ |
D | diagnostics.s | 143 mcr2 p7, #8, r5, c1, c1, #4 144 mcr2 p7, #1, r5, c1, c1, #8
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D | basic-thumb2-instructions.s | 1377 mcr2 p7, #1, r5, c1, c1, #4 1379 mcr2 p4, #2, r2, c1, c3 1382 @ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x21,0xfe,0x91,0x57] 1384 @ CHECK: mcr2 p4, #2, r2, c1, c3, #0 @ encoding: [0x41,0xfe,0x13,0x24]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
D | diagnostics.s | 159 mcr2 p7, #8, r5, c1, c1, #4 160 mcr2 p7, #1, r5, c1, c1, #8
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D | basic-thumb2-instructions.s | 1409 mcr2 p7, #1, r5, c1, c1, #4 1411 mcr2 p4, #2, r2, c1, c3 1414 @ CHECK: mcr2 p7, #1, r5, c1, c1, #4 @ encoding: [0x21,0xfe,0x91,0x57] 1416 @ CHECK: mcr2 p4, #2, r2, c1, c3, #0 @ encoding: [0x41,0xfe,0x13,0x24]
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/external/capstone/suite/MC/ARM/ |
D | basic-thumb2-instructions.s.cs | 428 0x21,0xfe,0x91,0x57 = mcr2 p7, #1, r5, c1, c1, #4 430 0x41,0xfe,0x13,0x24 = mcr2 p4, #2, r2, c1, c3, #0
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D | basic-arm-instructions.s.cs | 343 0x91,0x57,0x21,0xfe = mcr2 p7, #1, r5, c1, c1, #4
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/external/v8/src/arm/ |
D | assembler-arm.h | 975 void mcr2(Coprocessor coproc, int opcode_1,
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
D | ARMGenAsmMatcher.inc | 7744 "ldrsbt\005ldrsh\006ldrsht\004ldrt\003lsl\003lsr\003mcr\004mcr2\004mcrr\005" 8356 …{ 548 /* mcr2 */, ARM::MCR2, Convert__CoprocNum1_0__Imm0_71_1__Reg1_2__CoprocReg1_3__CoprocReg1_4_… 8357 …{ 548 /* mcr2 */, ARM::t2MCR2, Convert__CoprocNum1_1__Imm0_71_2__Reg1_3__CoprocReg1_4__CoprocReg1_… 8358 …{ 548 /* mcr2 */, ARM::MCR2, Convert__CoprocNum1_0__Imm0_71_1__Reg1_2__CoprocReg1_3__CoprocReg1_4_… 8359 …{ 548 /* mcr2 */, ARM::t2MCR2, Convert__CoprocNum1_1__Imm0_71_2__Reg1_3__CoprocReg1_4__CoprocReg1_… 12053 { Feature_IsARM, 548 /* mcr2 */, MCK_CoprocNum, 1 /* 0 */ }, 12054 { Feature_IsARM, 548 /* mcr2 */, MCK_CoprocReg, 24 /* 3, 4 */ }, 12055 { Feature_IsThumb2, 548 /* mcr2 */, MCK_CoprocNum, 2 /* 1 */ }, 12056 { Feature_IsThumb2, 548 /* mcr2 */, MCK_CoprocReg, 48 /* 4, 5 */ }, 12057 { Feature_IsARM|Feature_PreV8, 548 /* mcr2 */, MCK_CoprocNum, 1 /* 0 */ }, [all …]
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