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Searched refs:mdctl (Results 1 – 14 of 14) sorted by relevance

/external/u-boot/arch/arm/mach-keystone/
Dpsc.c97 u32 mdctl; in psc_set_state() local
130 mdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_set_state()
131 mdctl = PSC_REG_MDCTL_SET_NEXT(mdctl, state); in psc_set_state()
132 mdctl = PSC_REG_MDCTL_SET_RESET_ISO(mdctl, reset_iso); in psc_set_state()
133 __raw_writel(mdctl, KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_set_state()
157 u32 mdctl; in psc_enable_module() local
160 mdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_enable_module()
161 if ((mdctl & 0x3f) == PSC_REG_VAL_MDSTAT_STATE_ON) in psc_enable_module()
175 u32 mdctl; in psc_disable_module() local
178 mdctl = __raw_readl(KS2_PSC_BASE + PSC_REG_MDCTL(mod_num)); in psc_disable_module()
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/external/u-boot/arch/arm/mach-davinci/
Dpsc.c35 dv_reg_p mdstat, mdctl, ptstat, ptcmd; in lpsc_transition() local
45 mdctl = REG_P(PSC_MDCTL_BASE + (id * 4)); in lpsc_transition()
54 mdctl = &psc_regs->psc0.mdctl[id]; in lpsc_transition()
61 mdctl = &psc_regs->psc1.mdctl[id]; in lpsc_transition()
73 writel((readl(mdctl) & ~PSC_MDCTL_NEXT) | state, mdctl); in lpsc_transition()
92 writel(readl(mdctl) | 0x200, mdctl); in lpsc_transition()
Ddm365_lowlevel.c251 writel(((readl(&dv_psc_regs->mdctl[DAVINCI_LPSC_VPSSMASTER]) & in dm365_vpss_sync_reset()
253 &dv_psc_regs->mdctl[DAVINCI_LPSC_VPSSMASTER]); in dm365_vpss_sync_reset()
337 setbits_le32(&dv_psc_regs->mdctl[i], PSC_ENABLE); in dm365_psc_init()
/external/u-boot/drivers/ddr/fsl/
Dfsl_mmdc.c53 tmp = priv->mdctl & ~(MDCTL_SDE0 | MDCTL_SDE1); in mmdc_init()
54 out_be32(&mmdc->mdctl, tmp); in mmdc_init()
62 out_be32(&mmdc->mdctl, tmp | MDCTL_SDE0); in mmdc_init()
64 out_be32(&mmdc->mdctl, tmp | MDCTL_SDE0 | MDCTL_SDE1); in mmdc_init()
/external/u-boot/board/Barix/ipam390/
Dipam390.c45 dv_reg_p mdstat, mdctl, ptstat, ptcmd; in dsp_lpsc_on() local
50 mdctl = &psc_regs->psc0.mdctl[id]; in dsp_lpsc_on()
60 *mdctl |= 0x03; in dsp_lpsc_on()
/external/u-boot/board/davinci/da8xxevm/
Domapl138_lcdk.c262 dv_reg_p mdstat, mdctl, ptstat, ptcmd; in dsp_lpsc_on() local
267 mdctl = &psc_regs->psc0.mdctl[id]; in dsp_lpsc_on()
277 *mdctl |= 0x03; in dsp_lpsc_on()
Dda850evm.c77 dv_reg_p mdstat, mdctl, ptstat, ptcmd; in dsp_lpsc_on() local
82 mdctl = &psc_regs->psc0.mdctl[id]; in dsp_lpsc_on()
92 *mdctl |= 0x03; in dsp_lpsc_on()
/external/u-boot/arch/arm/mach-imx/
Dcpu.c107 #define ESD_MMDC_CTL_GET_ROW(mdctl) ((ctl >> 24) & 7) argument
108 #define ESD_MMDC_CTL_GET_COLUMN(mdctl) ((ctl >> 20) & 7) argument
109 #define ESD_MMDC_CTL_GET_WIDTH(mdctl) ((ctl >> 16) & 3) argument
110 #define ESD_MMDC_CTL_GET_CS1(mdctl) ((ctl >> 30) & 1) argument
/external/u-boot/arch/arm/mach-imx/mx6/
Dddr.c265 cs0_enable_initial = readl(&mmdc0->mdctl) & 0x80000000; in mmdc_do_dqs_calibration()
266 cs1_enable_initial = readl(&mmdc0->mdctl) & 0x40000000; in mmdc_do_dqs_calibration()
316 clrbits_le32(&mmdc0->mdctl, 1 << 30); /* clear SDE_1 */ in mmdc_do_dqs_calibration()
318 clrbits_le32(&mmdc0->mdctl, 1 << 31); /* clear SDE_0 */ in mmdc_do_dqs_calibration()
324 cs0_enable = readl(&mmdc0->mdctl) & 0x80000000; in mmdc_do_dqs_calibration()
325 cs1_enable = readl(&mmdc0->mdctl) & 0x40000000; in mmdc_do_dqs_calibration()
539 setbits_le32(&mmdc0->mdctl, 1 << 30); in mmdc_do_dqs_calibration()
543 setbits_le32(&mmdc0->mdctl, 1 << 31); in mmdc_do_dqs_calibration()
1165 mmdc0->mdctl = (lpddr2_cfg->rowaddr - 11) << 24 | /* ROW */ in mx6_lpddr2_cfg()
1175 mmdc0->mdctl |= (1 << 31) | /* SDE_0 for CS0 */ in mx6_lpddr2_cfg()
[all …]
/external/u-boot/include/
Dfsl_mmdc.h67 u32 mdctl; member
153 u32 mdctl; member
/external/u-boot/arch/arm/mach-davinci/include/mach/
Dpsc_defs.h49 unsigned int mdctl[52]; /* 0xA00 */ member
Dhardware.h344 dv_reg mdctl[PSC_PSC0_MODULE_ID_CNT]; member
349 dv_reg mdctl[PSC_PSC1_MODULE_ID_CNT]; member
/external/u-boot/board/freescale/ls1012afrdm/
Dls1012afrdm.c104 mparam.mdctl = 0x05180000; in dram_init()
/external/u-boot/arch/arm/include/asm/arch-mx6/
Dmx6-ddr.h39 u32 mdctl; member