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Searched refs:mem_number_of_ranks (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/drivers/ddr/altera/
Dsequencer.c163 switch (rwcfg->mem_number_of_ranks) { in set_rank_and_odt_mask()
380 for (r = 0; r < rwcfg->mem_number_of_ranks; in scc_mgr_set_all_ranks()
501 for (r = 0; r < rwcfg->mem_number_of_ranks; in scc_mgr_zero_all()
580 for (r = 0; r < rwcfg->mem_number_of_ranks; in scc_mgr_zero_group()
734 for (r = 0; r < rwcfg->mem_number_of_ranks; in scc_mgr_apply_group_all_out_delay_add_all_ranks()
883 for (r = 0; r < rwcfg->mem_number_of_ranks; r++) { in rw_mgr_mem_load_user()
1176 rwcfg->mem_number_of_ranks : in rw_mgr_mem_calibrate_write_test()
1244 rwcfg->mem_number_of_ranks : in rw_mgr_mem_calibrate_read_test_patterns()
1313 rwcfg->mem_number_of_ranks : in rw_mgr_mem_calibrate_read_load_patterns()
1371 const u32 rank_end = all_ranks ? rwcfg->mem_number_of_ranks : in rw_mgr_mem_calibrate_read_test()
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Dsequencer.h16 #define NUM_RANKS_PER_SHADOW_REG (rwcfg->mem_number_of_ranks / NUM_SHADOW_REGS)
/external/u-boot/arch/arm/mach-socfpga/
Dwrap_sdram_config.c247 .mem_number_of_ranks = RW_MGR_MEM_NUMBER_OF_RANKS,
/external/u-boot/arch/arm/mach-socfpga/include/mach/
Dsdram_gen5.h181 u8 mem_number_of_ranks; member