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Searched refs:mesaVis (Results 1 – 12 of 12) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i915/
Dintel_screen.c853 const struct gl_config * mesaVis, GLboolean isPixmap) in intelCreateBuffer() argument
866 _mesa_initialize_window_framebuffer(fb, mesaVis); in intelCreateBuffer()
868 if (mesaVis->redBits == 5) in intelCreateBuffer()
870 else if (mesaVis->sRGBCapable) in intelCreateBuffer()
872 else if (mesaVis->alphaBits == 0) in intelCreateBuffer()
881 if (mesaVis->doubleBufferMode) { in intelCreateBuffer()
891 if (mesaVis->depthBits == 24) { in intelCreateBuffer()
892 assert(mesaVis->stencilBits == 8); in intelCreateBuffer()
902 else if (mesaVis->depthBits == 16) { in intelCreateBuffer()
903 assert(mesaVis->stencilBits == 0); in intelCreateBuffer()
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Di830_context.c56 const struct gl_config * mesaVis, in i830CreateContext() argument
79 mesaVis, driContextPriv, in i830CreateContext()
Di915_context.c159 const struct gl_config * mesaVis, in i915CreateContext() argument
182 mesaVis, driContextPriv, in i915CreateContext()
Di830_context.h182 const struct gl_config * mesaVis,
Di915_context.h318 const struct gl_config * mesaVis,
Dintel_context.h342 const struct gl_config * mesaVis,
Dintel_context.c406 const struct gl_config * mesaVis, in intelInitContext() argument
426 if (!_mesa_initialize_context(&intel->ctx, api, mesaVis, shareCtx, in intelInitContext()
/external/mesa3d/src/mesa/drivers/dri/r200/
Dradeon_screen.c646 const struct gl_config *mesaVis, in radeonCreateBuffer() argument
653 const GLboolean swAccum = mesaVis->accumRedBits > 0; in radeonCreateBuffer()
654 const GLboolean swStencil = mesaVis->stencilBits > 0 && in radeonCreateBuffer()
655 mesaVis->depthBits != 24; in radeonCreateBuffer()
666 _mesa_initialize_window_framebuffer(&rfb->base, mesaVis); in radeonCreateBuffer()
668 if (mesaVis->redBits == 5) in radeonCreateBuffer()
670 else if (mesaVis->alphaBits == 0) in radeonCreateBuffer()
681 if (mesaVis->doubleBufferMode) { in radeonCreateBuffer()
687 if (mesaVis->depthBits == 24) { in radeonCreateBuffer()
688 if (mesaVis->stencilBits == 8) { in radeonCreateBuffer()
[all …]
/external/mesa3d/src/mesa/drivers/dri/radeon/
Dradeon_screen.c646 const struct gl_config *mesaVis, in radeonCreateBuffer() argument
653 const GLboolean swAccum = mesaVis->accumRedBits > 0; in radeonCreateBuffer()
654 const GLboolean swStencil = mesaVis->stencilBits > 0 && in radeonCreateBuffer()
655 mesaVis->depthBits != 24; in radeonCreateBuffer()
666 _mesa_initialize_window_framebuffer(&rfb->base, mesaVis); in radeonCreateBuffer()
668 if (mesaVis->redBits == 5) in radeonCreateBuffer()
670 else if (mesaVis->alphaBits == 0) in radeonCreateBuffer()
681 if (mesaVis->doubleBufferMode) { in radeonCreateBuffer()
687 if (mesaVis->depthBits == 24) { in radeonCreateBuffer()
688 if (mesaVis->stencilBits == 8) { in radeonCreateBuffer()
[all …]
/external/mesa3d/src/mesa/drivers/dri/i965/
Dintel_screen.c1605 const struct gl_config * mesaVis, GLboolean isPixmap) in intelCreateBuffer() argument
1612 intel_quantize_num_samples(screen, mesaVis->samples); in intelCreateBuffer()
1621 _mesa_initialize_window_framebuffer(fb, mesaVis); in intelCreateBuffer()
1628 if (mesaVis->redBits == 10 && mesaVis->alphaBits > 0) { in intelCreateBuffer()
1629 rgbFormat = mesaVis->redMask == 0x3ff00000 ? MESA_FORMAT_B10G10R10A2_UNORM in intelCreateBuffer()
1631 } else if (mesaVis->redBits == 10) { in intelCreateBuffer()
1632 rgbFormat = mesaVis->redMask == 0x3ff00000 ? MESA_FORMAT_B10G10R10X2_UNORM in intelCreateBuffer()
1634 } else if (mesaVis->redBits == 5) { in intelCreateBuffer()
1635 rgbFormat = mesaVis->redMask == 0x1f ? MESA_FORMAT_R5G6B5_UNORM in intelCreateBuffer()
1637 } else if (mesaVis->sRGBCapable) { in intelCreateBuffer()
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Dbrw_context.c845 const struct gl_config *mesaVis, in brwCreateContext() argument
924 if (!_mesa_initialize_context(ctx, api, mesaVis, shareCtx, &functions)) { in brwCreateContext()
Dbrw_context.h1330 const struct gl_config *mesaVis,