Searched refs:mfmsr (Results 1 – 17 of 17) sorted by relevance
/external/llvm/test/MC/PowerPC/ |
D | ppc64-encoding-bookIII.s | 12 # CHECK-BE: mfmsr 4 # encoding: [0x7c,0x80,0x00,0xa6] 13 # CHECK-LE: mfmsr 4 # encoding: [0xa6,0x00,0x80,0x7c] 14 mfmsr %r4
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
D | ppc64-encoding-bookIII.s | 20 # CHECK-BE: mfmsr 4 # encoding: [0x7c,0x80,0x00,0xa6] 21 # CHECK-LE: mfmsr 4 # encoding: [0xa6,0x00,0x80,0x7c] 22 mfmsr %r4
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/external/u-boot/arch/powerpc/cpu/mpc86xx/ |
D | start.S | 197 mfmsr r5 347 mfmsr r3 370 mfmsr r3 476 mfmsr r3 514 mfmsr r28 /* Disable interrupts */ 855 mfmsr r7
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/external/capstone/suite/MC/PowerPC/ |
D | ppc64-encoding-bookIII.s.cs | 4 0x7c,0x80,0x00,0xa6 = mfmsr 4
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/external/u-boot/arch/powerpc/cpu/mpc83xx/ |
D | start.S | 100 mfmsr r5 110 mfmsr r3 167 mfmsr r5 /* save msr contents */ 450 mfmsr r28 /* Disable interrupts */ 1050 mfmsr r3 /* now that the vectors have */
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/external/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-bookIII.txt | 9 # CHECK: mfmsr 4
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
D | ppc64-encoding-bookIII.txt | 15 # CHECK: mfmsr 4
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/external/u-boot/arch/powerpc/cpu/mpc85xx/ |
D | release.S | 319 mfmsr r13
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D | cpu.c | 304 msr = mfmsr (); in do_reset()
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D | cpu_init.c | 1020 msr = mfmsr(); in arch_preboot_os()
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D | start.S | 1315 mfmsr r28 /* Disable interrupts */
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/external/u-boot/arch/powerpc/cpu/mpc8xx/ |
D | start.S | 291 mfmsr r28 /* Disable interrupts */
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCSchedule.td | 254 // mfmsr SprMFMSR
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/external/u-boot/arch/powerpc/include/asm/ |
D | processor.h | 1145 #define mfmsr() ({unsigned int rval; \ macro
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/external/v8/src/ppc/ |
D | constants-ppc.h | 1619 V(mfmsr, MFMSR, 0x7C0000A6) \
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.td | 3585 "mfmsr $RT", IIC_SprMFMSR, []>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCInstrInfo.td | 4025 "mfmsr $RT", IIC_SprMFMSR, []>;
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