Searched refs:miisel (Results 1 – 18 of 18) sorted by relevance
| /external/u-boot/board/ti/am43xx/ |
| D | board.c | 880 writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel); in board_eth_init()
884 writel(RGMII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
889 writel(RGMII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
893 writel(RGMII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
|
| /external/u-boot/board/birdland/bav335x/ |
| D | board.c | 407 writel(MII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
413 writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel); in board_eth_init()
|
| /external/u-boot/board/compulab/cm_t335/ |
| D | cm_t335.c | 138 writel(RGMII_MODE_ENABLE | RGMII_INT_DELAY, &cdev->miisel); in board_eth_init()
|
| /external/u-boot/board/compulab/cm_t43/ |
| D | cm_t43.c | 155 writel(RGMII_MODE_ENABLE | RGMII_INT_DELAY, &cdev->miisel); in board_eth_init()
|
| /external/u-boot/board/ti/am335x/ |
| D | board.c | 875 writel(MII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
879 writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel); in board_eth_init()
885 writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel); in board_eth_init()
|
| /external/u-boot/board/silica/pengwyn/ |
| D | board.c | 192 writel(MII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
|
| /external/u-boot/board/grinn/chiliboard/ |
| D | board.c | 194 writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel); in board_eth_init()
|
| /external/u-boot/board/phytec/pcm051/ |
| D | board.c | 237 writel(RMII_RGMII2_MODE_ENABLE, &cdev->miisel); in board_eth_init()
|
| /external/u-boot/board/isee/igep003x/ |
| D | board.c | 281 &cdev->miisel); in board_eth_init()
|
| /external/u-boot/board/gumstix/pepper/ |
| D | board.c | 255 writel((RGMII_MODE_ENABLE | RGMII_INT_DELAY), &cdev->miisel); in board_eth_init()
|
| /external/u-boot/board/tcl/sl50/ |
| D | board.c | 348 writel(MII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
|
| /external/u-boot/board/siemens/draco/ |
| D | board.c | 333 writel((RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE), &cdev->miisel); in board_eth_init()
|
| /external/u-boot/board/siemens/rut/ |
| D | board.c | 186 writel((RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE), &cdev->miisel); in board_eth_init()
|
| /external/u-boot/board/siemens/pxm2/ |
| D | board.c | 230 writel(RGMII_MODE_ENABLE | RGMII_INT_DELAY, &cdev->miisel); in board_eth_init()
|
| /external/u-boot/board/vscom/baltos/ |
| D | board.c | 463 writel((GMII1_SEL_RMII | GMII2_SEL_RGMII | RGMII2_IDMODE), &cdev->miisel); in board_eth_init()
|
| /external/u-boot/board/bosch/shc/ |
| D | board.c | 554 writel(MII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
|
| /external/u-boot/arch/arm/include/asm/arch-am33xx/ |
| D | cpu.h | 505 unsigned int miisel; /* offset 0x50 */ member
|
| /external/u-boot/board/BuR/common/ |
| D | common.c | 670 writel(MII_MODE_ENABLE, &cdev->miisel); in board_eth_init()
|