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Searched refs:min3 (Results 1 – 20 of 20) sorted by relevance

/external/llvm/test/CodeGen/X86/
Dscalar_sse_minmax.ll20 define <4 x float> @min3(float %x, float %y) {
21 ; CHECK-LABEL: min3
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dscalar_sse_minmax.ll20 define <4 x float> @min3(float %x, float %y) {
21 ; CHECK-LABEL: min3
/external/u-boot/drivers/usb/host/
Ddwc2.c602 len = min3(txlen, (int)sizeof(root_hub_dev_des), (int)wLength); in dwc_otg_submit_rh_msg_in_descriptor()
606 len = min3(txlen, (int)sizeof(root_hub_config_des), (int)wLength); in dwc_otg_submit_rh_msg_in_descriptor()
612 len = min3(txlen, (int)sizeof(root_hub_str_index0), in dwc_otg_submit_rh_msg_in_descriptor()
617 len = min3(txlen, (int)sizeof(root_hub_str_index1), in dwc_otg_submit_rh_msg_in_descriptor()
655 len = min3(txlen, (int)data[0], (int)wLength); in dwc_otg_submit_rh_msg_in_descriptor()
Dehci-hcd.c921 len = min3(srclen, (int)le16_to_cpu(req->length), length); in ehci_submit_root()
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/SLPVectorizer/AMDGPU/
Dreduction.ll326 %min3 = select i1 %cmp3, i16 %elt3, i16 %min2
328 ret i16 %min3
387 %min3 = select i1 %cmp2, i16 %elt3, i16 %min2
389 %cmp3 = icmp ult i16 %elt4, %min3
390 %min4 = select i1 %cmp3, i16 %elt4, i16 %min3
494 %min3 = select i1 %cmp2, i16 %elt3, i16 %min2
496 %cmp3 = icmp slt i16 %elt4, %min3
497 %min4 = select i1 %cmp3, i16 %elt4, i16 %min3
693 %min3 = select i1 %cmp3, half %elt3, half %min2
695 ret half %min3
/external/swiftshader/third_party/LLVM/test/CodeGen/X86/
Dscalar_sse_minmax.ll38 define <4 x float> @min3(float %tmp37) {
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dreduction.ll202 %min3 = select i1 %cmp2, i16 %elt3, i16 %min2
204 %cmp3 = icmp ult i16 %elt4, %min3
205 %min4 = select i1 %cmp3, i16 %elt4, i16 %min3
302 %min3 = select i1 %cmp2, i16 %elt3, i16 %min2
304 %cmp3 = icmp slt i16 %elt4, %min3
305 %min4 = select i1 %cmp3, i16 %elt4, i16 %min3
Dfmin3.ll88 ; Checks whether the test passes; performMinMaxCombine() should not optimize vector patterns of min3
/external/swiftshader/third_party/LLVM/test/Transforms/InstSimplify/
Dmaxmin.ll93 define i1 @min3(i32 %x, i32 %y) {
94 ; CHECK: @min3
/external/u-boot/include/linux/
Dkernel.h170 #define min3(x, y, z) min((typeof(x))min(x, y), z) macro
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstSimplify/
Dmaxmin.ll104 define i1 @min3(i32 %x, i32 %y) {
105 ; CHECK-LABEL: @min3(
/external/llvm/test/Transforms/InstSimplify/
Dmaxmin.ll104 define i1 @min3(i32 %x, i32 %y) {
105 ; CHECK-LABEL: @min3(
/external/u-boot/drivers/spi/
Dpic32_spi.c116 return min3(tx_left, tx_room, (u32)(priv->fifo_n_word - rxtx_gap)); in pic32_tx_max()
Ddesignware_spi.c277 return min3(tx_left, tx_room, (u32)(priv->fifo_len - rxtx_gap)); in tx_max()
/external/expat/lib/
Dxmltok.c1346 min3 = 0x800, in XmlUtf8Encode() enumerator
1356 if (c < min3) { in XmlUtf8Encode()
/external/python/cpython2/Modules/expat/
Dxmltok.c1346 min3 = 0x800, in XmlUtf8Encode() enumerator
1356 if (c < min3) { in XmlUtf8Encode()
/external/python/cpython3/Modules/expat/
Dxmltok.c1349 min3 = 0x800, in XmlUtf8Encode() enumerator
1359 if (c < min3) { in XmlUtf8Encode()
/external/llvm/test/Transforms/InstCombine/
Dfast-math.ll815 define double @min3(double %a, double %b) {
819 ; CHECK-LABEL: min3(
/external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/InstCombine/
Dfast-math.ll1094 define double @min3(double %a, double %b) {
1095 ; CHECK-LABEL: @min3(
/external/mesa3d/src/compiler/glsl/
Dbuiltin_functions.cpp944 B1(min3)
5929 ir_expression *min3 = min2(x, min2(y,z)); in _min3() local
5930 body.emit(ret(min3)); in _min3()