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Searched refs:moveToVALU (Results 1 – 10 of 10) sorted by relevance

/external/llvm/lib/Target/AMDGPU/
DSIFixSGPRCopies.cpp268 TII->moveToVALU(MI); in runOnMachineFunction()
320 TII->moveToVALU(MI); in runOnMachineFunction()
340 TII->moveToVALU(MI); in runOnMachineFunction()
352 TII->moveToVALU(MI); in runOnMachineFunction()
363 TII->moveToVALU(MI); in runOnMachineFunction()
DSIInstrInfo.h489 void moveToVALU(MachineInstr &MI) const;
DSIInstrInfo.cpp2496 void SIInstrInfo::moveToVALU(MachineInstr &TopInst) const { in moveToVALU() function in SIInstrInfo
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIFixSGPRCopies.cpp602 TII->moveToVALU(MI); in runOnMachineFunction()
617 TII->moveToVALU(MI); in runOnMachineFunction()
680 TII->moveToVALU(MI); in runOnMachineFunction()
693 TII->moveToVALU(MI); in runOnMachineFunction()
703 TII->moveToVALU(MI); in runOnMachineFunction()
DSIInstrInfo.h787 void moveToVALU(MachineInstr &MI) const;
DAMDGPU.td370 // FIXME: moveToVALU should be able to handle converting addr64 MUBUF
DSIInstrInfo.cpp3776 void SIInstrInfo::moveToVALU(MachineInstr &TopInst) const { in moveToVALU() function in SIInstrInfo
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dmove-to-valu-worklist.ll3 ; In moveToVALU(), move to vector ALU is performed, all instrs in
Dmove-addr64-rsrc-dead-subreg-writes.ll3 ; Check that when mubuf addr64 instruction is handled in moveToVALU
/external/llvm/test/CodeGen/AMDGPU/
Dmove-addr64-rsrc-dead-subreg-writes.ll3 ; Check that when mubuf addr64 instruction is handled in moveToVALU