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Searched refs:movi (Results 1 – 25 of 181) sorted by relevance

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/external/capstone/suite/MC/AArch64/
Dneon-mov.s.cs2 0x20,0x04,0x00,0x0f = movi v0.2s, #0x1
3 0x01,0x04,0x00,0x0f = movi v1.2s, #0x0
4 0x2f,0x24,0x00,0x0f = movi v15.2s, #0x1, lsl #8
5 0x30,0x44,0x00,0x0f = movi v16.2s, #0x1, lsl #16
6 0x3f,0x64,0x00,0x0f = movi v31.2s, #0x1, lsl #24
7 0x20,0x04,0x00,0x4f = movi v0.4s, #0x1
8 0x20,0x24,0x00,0x4f = movi v0.4s, #0x1, lsl #8
9 0x20,0x44,0x00,0x4f = movi v0.4s, #0x1, lsl #16
10 0x20,0x64,0x00,0x4f = movi v0.4s, #0x1, lsl #24
11 0x20,0x84,0x00,0x0f = movi v0.4h, #0x1
[all …]
/external/llvm/test/MC/AArch64/
Dneon-mov.s9 movi v0.2s, #1
10 movi v1.2s, #0
11 movi v15.2s, #1, lsl #8
12 movi v16.2s, #1, lsl #16
13 movi v31.2s, #1, lsl #24
14 movi v0.4s, #1
15 movi v0.4s, #1, lsl #8
16 movi v0.4s, #1, lsl #16
17 movi v0.4s, #1, lsl #24
18 movi v0.4h, #1
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dneon-mov.s9 movi v0.2s, #1
10 movi v1.2s, #0
11 movi v15.2s, #1, lsl #8
12 movi v16.2s, #1, lsl #16
13 movi v31.2s, #1, lsl #24
14 movi v0.4s, #1
15 movi v0.4s, #1, lsl #8
16 movi v0.4s, #1, lsl #16
17 movi v0.4s, #1, lsl #24
18 movi v0.4h, #1
[all …]
Dcyclone-movi-bug.s4 ; CHECK: movi v3.16b, #0
5 ; CHECK: movi v7.16b, #0
6 …CK-ERR: warning: instruction movi.2d with immediate #0 may not function correctly on this CPU, con…
7 …CK-ERR: warning: instruction movi.2d with immediate #0 may not function correctly on this CPU, con…
8 movi.2d v3, #0
9 movi v7.2d, #0
/external/u-boot/arch/xtensa/cpu/
Dstart.S82 movi a0, 0
107 movi a3, 1
111 movi a0, 0 /* windowbase might have changed */
120 movi a3, XCHAL_VECBASE_RESET_VADDR /* VECBASE reset value */
133 movi a2, 1
135 movi a2, XCHAL_EXCM_LEVEL
151 movi a2, __reloc_table_start
152 movi a3, __reloc_table_end
201 movi a2, XCHAL_EXCM_LEVEL
203 movi a2, (1<<PS_WOE_BIT) | XCHAL_EXCM_LEVEL
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Dneon-mov.ll5 ; CHECK: movi {{v[0-9]+}}.8b, #{{0x8|8}}
11 ; CHECK: movi {{v[0-9]+}}.16b, #{{0x8|8}}
17 ; CHECK: movi {{d[0-9]+}}, #0x0000ff000000ff
23 ; CHECK: movi {{d[0-9]+}}, #0x00ff000000ff00
29 ; CHECK: movi {{d[0-9]+}}, #0xff000000ff0000
36 ; CHECK: movi {{d[0-9]+}}, #0xff000000ff000000
42 ; CHECK: movi {{v[0-9]+}}.2d, #0x0000ff000000ff
48 ; CHECK: movi {{v[0-9]+}}.2d, #0x00ff000000ff00
54 ; CHECK: movi {{v[0-9]+}}.2d, #0xff000000ff0000
61 ; CHECK: movi {{v[0-9]+}}.2d, #0xff000000ff000000
[all …]
Daarch64-be-bv.ll8 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1
20 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1, lsl #8
32 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1, lsl #16
44 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1, lsl #24
56 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].8h, #1
68 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].8h, #1, lsl #8
80 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1, msl #8
92 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1, msl #16
104 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].16b, #1
116 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].2d, #0x00ffff0000ffff
[all …]
Dbuild-one-lane.ll11 ; CHECK: movi d[[R:[0-9]+]], #0
20 ; CHECK: movi v[[R:[0-9]+]].2d, #0
29 ; CHECK: movi d[[R:[0-9]+]], #0
38 ; CHECK: movi v[[R:[0-9]+]].2d, #0
47 ; CHECK: movi d[[R:[0-9]+]], #0
56 ; CHECK: movi v[[R:[0-9]+]].2d, #0
65 ; CHECK: movi v[[R:[0-9]+]].2d, #0
74 ; CHECK: movi d[[R:[0-9]+]], #0
83 ; CHECK: movi v[[R:[0-9]+]].2d, #0
92 ; CHECK: movi v[[R:[0-9]+]].2d, #0
[all …]
Dfast-isel-cmp-vec.ll14 ; CHECK-NEXT: movi.2s [[MASK:v[0-9]+]], #1
27 ; CHECK-NEXT: movi d[[CMP:[0-9]+]], #0xffffffffffffffff
29 ; CHECK-NEXT: movi.2s [[MASK:v[0-9]+]], #1
45 ; CHECK-NEXT: movi.4h [[MASK:v[0-9]+]], #1
59 ; CHECK-NEXT: movi d[[CMP:[0-9]+]], #0xffffffffffffffff
61 ; CHECK-NEXT: movi.4h [[MASK:v[0-9]+]], #1
77 ; CHECK-NEXT: movi.16b [[MASK:v[0-9]+]], #1
90 ; CHECK-NEXT: movi.2d [[CMP:v[0-9]+]], #0xffffffffffffffff
92 ; CHECK-NEXT: movi.16b [[MASK:v[0-9]+]], #1
Darm64-zero-cycle-zeroing.ll20 ; CYCLONE: movi.16b v3, #0
24 ; CYCLONE-FULLFP16: movi.16b v3, #0
25 ; OTHERS: movi v{{[0-3]+}}.2d, #0000000000000000
26 ; OTHERS: movi v{{[0-3]+}}.2d, #0000000000000000
27 ; OTHERS: movi v{{[0-3]+}}.2d, #0000000000000000
59 ; OTHERS: movi v{{[0-3]+}}.2d, #0000000000000000
60 ; OTHERS: movi v{{[0-3]+}}.2d, #0000000000000000
91 ; CYCLONE: movi.16b v0, #0
92 ; OTHERS: movi v0.2d, #0000000000000000
Darm64-vector-imm.ll53 ; CHECK: movi.4s v0, #75
60 ; CHECK: movi.4s v0, #75, lsl #8
67 ; CHECK: movi.4s v0, #75, lsl #16
74 ; CHECK: movi.4s v0, #75, lsl #24
81 ; CHECK: movi.8h v0, #75
89 ; CHECK: movi.8h v0, #75, lsl #8
96 ; CHECK: movi.4s v0, #75, msl #8
103 ; CHECK: movi.4s v0, #75, msl #16
110 ; CHECK: movi.16b v0, #75
118 ; CHECK: movi.2d v0, #0xff00ff00ff00ff
Dfp16-vector-nvcast.ll6 ; CHECK-NEXT: movi v[[REG:[0-9]+]].2s, #171, lsl #16
17 ; CHECK-NEXT: movi v[[REG:[0-9]+]].4h, #171
28 ; CHECK-NEXT: movi v[[REG:[0-9]+]].8b, #171
39 ; CHECK-NEXT: movi d[[REG:[0-9]+]], #0000000000000000
49 ; CHECK-NEXT: movi v[[REG:[0-9]+]].4s, #171, lsl #16
60 ; CHECK-NEXT: movi v[[REG:[0-9]+]].8h, #171
71 ; CHECK-NEXT: movi v[[REG:[0-9]+]].16b, #171
82 ; CHECK-NEXT: movi v[[REG:[0-9]+]].2d, #0000000000000000
Dbitreverse.ll34 ; CHECK-DAG: movi [[M1:v.*]], #15
35 ; CHECK-DAG: movi [[M2:v.*]], #240
42 ; CHECK-DAG: movi [[M3:v.*]], #51
43 ; CHECK-DAG: movi [[M4:v.*]], #204
50 ; CHECK-DAG: movi [[M5:v.*]], #85
51 ; CHECK-DAG: movi [[M6:v.*]], #170
/external/llvm/test/CodeGen/AArch64/
Dneon-mov.ll5 ; CHECK: movi {{v[0-9]+}}.8b, #{{0x8|8}}
11 ; CHECK: movi {{v[0-9]+}}.16b, #{{0x8|8}}
17 ; CHECK: movi {{d[0-9]+}}, #0x0000ff000000ff
23 ; CHECK: movi {{d[0-9]+}}, #0x00ff000000ff00
29 ; CHECK: movi {{d[0-9]+}}, #0xff000000ff0000
36 ; CHECK: movi {{d[0-9]+}}, #0xff000000ff000000
42 ; CHECK: movi {{v[0-9]+}}.2d, #0x0000ff000000ff
48 ; CHECK: movi {{v[0-9]+}}.2d, #0x00ff000000ff00
54 ; CHECK: movi {{v[0-9]+}}.2d, #0xff000000ff0000
61 ; CHECK: movi {{v[0-9]+}}.2d, #0xff000000ff000000
[all …]
Darm64-zero-cycle-zeroing.ll11 ; CYCLONE: movi.2d v0, #0000000000000000
12 ; CYCLONE: movi.2d v1, #0000000000000000
13 ; CYCLONE: movi.2d v2, #0000000000000000
14 ; CYCLONE: movi.2d v3, #0000000000000000
15 ; KRYO: movi v0.2d, #0000000000000000
16 ; KRYO: movi v1.2d, #0000000000000000
17 ; KRYO: movi v2.2d, #0000000000000000
18 ; KRYO: movi v3.2d, #0000000000000000
46 ; CYCLONE: movi.2d v0, #0000000000000000
47 ; CYCLONE: movi.2d v1, #0000000000000000
[all …]
Daarch64-be-bv.ll8 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1
20 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1, lsl #8
32 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1, lsl #16
44 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1, lsl #24
56 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].8h, #1
68 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].8h, #1, lsl #8
80 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1, msl #8
92 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].4s, #1, msl #16
104 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].16b, #1
116 ; CHECK-NEXT: movi v[[REG2:[0-9]+]].2d, #0x00ffff0000ffff
[all …]
Dfast-isel-cmp-vec.ll14 ; CHECK-NEXT: movi.2s [[MASK:v[0-9]+]], #1
27 ; CHECK-NEXT: movi d[[CMP:[0-9]+]], #0xffffffffffffffff
29 ; CHECK-NEXT: movi.2s [[MASK:v[0-9]+]], #1
45 ; CHECK-NEXT: movi.4h [[MASK:v[0-9]+]], #1
59 ; CHECK-NEXT: movi d[[CMP:[0-9]+]], #0xffffffffffffffff
61 ; CHECK-NEXT: movi.4h [[MASK:v[0-9]+]], #1
77 ; CHECK-NEXT: movi.16b [[MASK:v[0-9]+]], #1
90 ; CHECK-NEXT: movi.2d [[CMP:v[0-9]+]], #0xffffffffffffffff
92 ; CHECK-NEXT: movi.16b [[MASK:v[0-9]+]], #1
Darm64-vector-imm.ll53 ; CHECK: movi.4s v0, #75
60 ; CHECK: movi.4s v0, #75, lsl #8
67 ; CHECK: movi.4s v0, #75, lsl #16
74 ; CHECK: movi.4s v0, #75, lsl #24
81 ; CHECK: movi.8h v0, #75
89 ; CHECK: movi.8h v0, #75, lsl #8
96 ; CHECK: movi.4s v0, #75, msl #8
103 ; CHECK: movi.4s v0, #75, msl #16
110 ; CHECK: movi.16b v0, #75
118 ; CHECK: movi.2d v0, #0xff00ff00ff00ff
Darm64-fcmp-opt.ll44 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0
56 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0
68 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0
80 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0
92 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0
104 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0
115 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0
126 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0
137 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0
148 ; CHECK-DAG: movi.2d v[[ZERO:[0-9]+]], #0
[all …]
Dfp16-vector-nvcast.ll6 ; CHECK-NEXT: movi v[[REG:[0-9]+]].2s, #171, lsl #16
17 ; CHECK-NEXT: movi v[[REG:[0-9]+]].4h, #171
28 ; CHECK-NEXT: movi v[[REG:[0-9]+]].8b, #171
39 ; CHECK-NEXT: movi d[[REG:[0-9]+]], #0000000000000000
49 ; CHECK-NEXT: movi v[[REG:[0-9]+]].4s, #171, lsl #16
60 ; CHECK-NEXT: movi v[[REG:[0-9]+]].8h, #171
71 ; CHECK-NEXT: movi v[[REG:[0-9]+]].16b, #171
82 ; CHECK-NEXT: movi v[[REG:[0-9]+]].2d, #0000000000000000
Dbitreverse.ll51 ; CHECK-DAG: movi [[M1:v.*]], #128
52 ; CHECK-DAG: movi [[M2:v.*]], #64
53 ; CHECK-DAG: movi [[M3:v.*]], #32
54 ; CHECK-DAG: movi [[M4:v.*]], #16
55 ; CHECK-DAG: movi [[M5:v.*]], #8{{$}}
56 ; CHECK-DAG: movi [[M6:v.*]], #4{{$}}
57 ; CHECK-DAG: movi [[M7:v.*]], #2{{$}}
58 ; CHECK-DAG: movi [[M8:v.*]], #1{{$}}
/external/libhevc/common/arm64/
Dihevc_intra_pred_luma_vert.s195 movi d18, #0x00000000000000ff
210 movi d3, #0x00000000000000ff define
226 movi d1, #0x00000000000000ff define
229 movi d6, #0x00000000000000ff define
250 movi d18, #0x00000000000000ff
253 movi d3, #0x00000000000000ff define
260 movi d1, #0x00000000000000ff define
262 movi d6, #0x00000000000000ff define
273 movi d18, #0x00000000000000ff
275 movi d3, #0x00000000000000ff define
[all …]
Dihevc_intra_pred_luma_dc.s248 movi d19, #0x00000000000000ff //
259 movi d20, #0x00000000000000ff //byte mask row 1 (prol)
265 movi d21, #0x00000000000000ff //byte mask row 2 (prol)
274 movi d20, #0x00000000000000ff //byte mask row 3 (prol)
282 movi d21, #0x00000000000000ff //byte mask row 4 (prol)
290 movi d20, #0x00000000000000ff //byte mask row 5 (prol)
298 movi d21, #0x00000000000000ff //byte mask row 6 (prol)
309 movi d20, #0x00000000000000ff //byte mask row 7 (prol)
326 movi d20, #0x00000000000000ff //byte mask row 9 (prol)
348 movi d20, #0x00000000000000ff //byte mask row 9 (prol)
[all …]
/external/python/cpython2/Modules/_ctypes/libffi/src/xtensa/
Dsysv.S65 movi a8, ffi_prep_args
71 movi a10, 6*4
98 movi a5, FFI_TYPE_STRUCT
100 movi a5, 16
117 movi a6, store_calls
221 movi a8, ffi_closure_SYSV_inner
232 movi a11, FFI_TYPE_UINT8
237 1: movi a11, FFI_TYPE_SINT8
242 1: movi a11, FFI_TYPE_UINT16
247 1: movi a11, FFI_TYPE_SINT16
/external/libffi/src/xtensa/
Dsysv.S65 movi a8, ffi_prep_args
71 movi a10, 6*4
98 movi a5, FFI_TYPE_STRUCT
100 movi a5, 16
117 movi a6, store_calls
221 movi a8, ffi_closure_SYSV_inner
232 movi a11, FFI_TYPE_UINT8
237 1: movi a11, FFI_TYPE_SINT8
242 1: movi a11, FFI_TYPE_UINT16
247 1: movi a11, FFI_TYPE_SINT16

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