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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dthumb-mov.s13 movs pc, r0
14 movs r0, pc
15 movs pc, pc
39 movs.w pc, r0
40 movs.w r0, pc
41 movs.w pc, pc
54 movs sp, r0
55 movs r0, sp
56 movs sp, sp
72 movs.w sp, r0
[all …]
Dlsl-zero-errors.s52 movs pc, r0, lsl #0
53 movs r0, pc, lsl #0
54 movs pc, pc, lsl #0
126 movs sp, sp, lsl #0
127 movs r0, sp, lsl #0
128 movs sp, r0, lsl #0
Dcoff-relocations.s57 @ CHECK-ENCODING-NEXT: movs r0, r0
58 @ CHECK-ENCODING-NEXT: movs r0, r0
72 @ CHECK-ENCODING-NEXT: movs r0, r0
73 @ CHECK-ENCODING-NEXT: movs r0, r0
87 @ CHECK-ENCODING-NEXT: movs r0, r0
88 @ CHECK-ENCODING-NEXT: movs r0, r0
Darm-thumb-cpus-default.s21 movs r0, r0
22 @ CHECK-ARM-THUMB: movs r0, r0 @ encoding: [0x00,0x00,0xb0,0xe1]
23 @ CHECK-ARM-ONLY: movs r0, r0 @ encoding: [0x00,0x00,0xb0,0xe1]
24 @ CHECK-THUMB-ONLY: movs r0, r0 @ encoding: [0x00,0x00]
/external/mesa3d/src/gallium/drivers/vc4/
Dvc4_opt_copy_propagation.c65 try_copy_prop(struct vc4_compile *c, struct qinst *inst, struct qinst **movs) in try_copy_prop() argument
82 struct qinst *mov = movs[inst->src[i].index]; in try_copy_prop()
157 apply_kills(struct vc4_compile *c, struct qinst **movs, struct qinst *inst) in apply_kills() argument
163 if (movs[i] && in apply_kills()
164 (movs[i]->dst.index == inst->dst.index || in apply_kills()
165 (movs[i]->src[0].file == QFILE_TEMP && in apply_kills()
166 movs[i]->src[0].index == inst->dst.index))) { in apply_kills()
167 movs[i] = NULL; in apply_kills()
176 struct qinst **movs; in qir_opt_copy_propagation() local
178 movs = ralloc_array(c, struct qinst *, c->num_temps); in qir_opt_copy_propagation()
[all …]
/external/mesa3d/src/broadcom/compiler/
Dvir_opt_copy_propagate.c121 try_copy_prop(struct v3d_compile *c, struct qinst *inst, struct qinst **movs) in try_copy_prop() argument
138 struct qinst *mov = movs[inst->src[i].index]; in try_copy_prop()
189 apply_kills(struct v3d_compile *c, struct qinst **movs, struct qinst *inst) in apply_kills() argument
195 if (movs[i] && in apply_kills()
196 (movs[i]->dst.index == inst->dst.index || in apply_kills()
197 (movs[i]->src[0].file == QFILE_TEMP && in apply_kills()
198 movs[i]->src[0].index == inst->dst.index))) { in apply_kills()
199 movs[i] = NULL; in apply_kills()
208 struct qinst **movs; in vir_opt_copy_propagate() local
210 movs = ralloc_array(c, struct qinst *, c->num_temps); in vir_opt_copy_propagate()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb/
Dlong.ll10 ; CHECK: movs r0, #0
11 ; CHECK: movs r1, r0
18 ; CHECK: movs r0, #1
19 ; CHECK: movs r1, #0
27 ; CHECK: movs r1, #0
34 ; CHECK: movs r0, #1
36 ; CHECK: movs r1, #0
43 ; CHECK: movs r0, #0
53 ; CHECK: movs r1, #0
63 ; CHECK: movs r0, r2
[all …]
Dthumb-shrink-wrapping.ll43 ; CHECK: movs r0, #0
91 ; CHECK: movs r0, #42
137 ; CHECK: movs [[SUM:r0]], #0
138 ; CHECK-NEXT: movs [[IV:r[0-9]+]], #10
142 ; CHECK: movs [[TMP:r[0-9]+]], #1
178 %call = tail call i32 asm sideeffect "movs $0, #1", "=r,~{r4}"()
207 ; CHECK: movs [[SUM:r0]], #0
208 ; CHECK-NEXT: movs [[IV:r[0-9]+]], #10
211 ; CHECK: movs [[TMP:r[0-9]+]], #1
231 %call = tail call i32 asm sideeffect "movs $0, #1", "=r,~{r4}"()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dcmn.ll9 ; T2-NEXT: movs r1, #24
19 ; T1-NEXT: movs r0, #77
21 ; T1-NEXT: movs r0, #42
22 ; T1-NEXT: movs r2, #24
38 ; T2-NEXT: movs r2, #24
48 ; T1-NEXT: movs r0, #42
49 ; T1-NEXT: movs r3, #24
Dintrinsics-overflow.ll17 ; THUMBV6: movs r[[R2:[0-9]+]], #0
43 ; THUMBV6: movs r[[R0]], #0
44 ; THUMBV6: movs r[[R1]], #1
69 ; THUMBV6: movs r[[R2:[0-9]+]], #0
72 ; THUMBV6: movs r[[R0]], #1
97 ; THUMBV6: movs r[[R0]], #0
98 ; THUMBV6: movs r[[R3:[0-9]+]], #1
104 ; THUMBV7: movs r[[R2:[0-9]+]], #1
Dselect-imm.ll28 ; THUMB1: movs r2, #255
30 ; THUMB1: movs r0, #123
78 ; THUMB1: movs r1, #0
123 ; THUMB1: movs r0, #0
203 ; THUMB1: movs r0, #0
309 ; THUMB1: movs r0, #0
318 ; V8MBASE-NOT: movs r0, #0
319 ; V8MBASE: movs r0, #7
350 ; THUMB1-NOT: movs r0, #0
351 ; THUMB1: movs r0, #5
[all …]
Dload.ll176 ; CHECK-T1: movs r1, #31
188 ; CHECK-T1: movs r1, #62
261 ; CHECK-T1: movs r1, #32
273 ; CHECK-T1: movs r1, #64
285 ; CHECK-T1: movs r1, #32
297 ; CHECK-T1: movs r1, #64
309 ; CHECK-T1: movs r1, #128
320 ; CHECK-T1: movs r2, #32
332 ; CHECK-T1: movs r2, #64
344 ; CHECK-T1: movs r2, #128
[all …]
Darm-cgp-icmps.ll8 ; CHECK-DSP-NEXT: movs r0, #47
13 ; CHECK-DSP-IMM: movs r1, #1
15 ; CHECK-DSP-IMM-NEXT: movs r0, #47
41 ; CHECK-NODSP-NEXT: movs r0, #47
47 ; CHECK-DSP-NEXT: movs r0, #47
73 ; CHECK-COMMON-NEXT: movs r0, #47
100 ; CHECK-NODSP-NEXT: movs r0, #47
106 ; CHECK-DSP-NEXT: movs r0, #47
136 ; CHECK-DSP-NEXT: movs r0, #47
144 ; CHECK-DSP-IMM-NEXT: movs r1, #1
[all …]
/external/mesa3d/src/intel/compiler/
Dbrw_fs_sel_peephole.cpp155 int movs = count_movs_from_if(then_mov, else_mov, then_block, else_block); in opt_peephole_sel() local
157 if (movs == 0) in opt_peephole_sel()
161 for (int i = 0; i < movs; i++) { in opt_peephole_sel()
174 movs = i; in opt_peephole_sel()
180 movs = i; in opt_peephole_sel()
185 if (movs == 0) in opt_peephole_sel()
188 for (int i = 0; i < movs; i++) { in opt_peephole_sel()
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/SVE/
Dmovs.s10 movs p0.b, p0.b label
16 movs p15.b, p15.b label
22 movs p0.b, p0/z, p0.b label
28 movs p15.b, p15/z, p15.b label
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrExtension.td42 "movs{bw|x}\t{$src, $dst|$dst, $src}", []>,
46 "movs{bw|x}\t{$src, $dst|$dst, $src}", []>,
50 "movs{bl|x}\t{$src, $dst|$dst, $src}",
54 "movs{bl|x}\t{$src, $dst|$dst, $src}",
58 "movs{wl|x}\t{$src, $dst|$dst, $src}",
62 "movs{wl|x}\t{$src, $dst|$dst, $src}",
97 "movs{ww|x}\t{$src, $dst|$dst, $src}",
104 "movs{ww|x}\t{$src, $dst|$dst, $src}",
128 "movs{bl|x}\t{$src, $dst|$dst, $src}",
133 "movs{bl|x}\t{$src, $dst|$dst, $src}",
[all …]
/external/llvm/test/MC/ARM/
Dcoff-relocations.s57 @ CHECK-ENCODING-NEXT: movs r0, r0
58 @ CHECK-ENCODING-NEXT: movs r0, r0
72 @ CHECK-ENCODING-NEXT: movs r0, r0
73 @ CHECK-ENCODING-NEXT: movs r0, r0
87 @ CHECK-ENCODING-NEXT: movs r0, r0
88 @ CHECK-ENCODING-NEXT: movs r0, r0
Darm-thumb-cpus-default.s21 movs r0, r0
22 @ CHECK-ARM-THUMB: movs r0, r0 @ encoding: [0x00,0x00,0xb0,0xe1]
23 @ CHECK-ARM-ONLY: movs r0, r0 @ encoding: [0x00,0x00,0xb0,0xe1]
24 @ CHECK-THUMB-ONLY: movs r0, r0 @ encoding: [0x00,0x00]
Dmisaligned-blx.s30 movs r0, r0
32 movs r0, r0
34 movs r0, r0
/external/llvm/lib/Target/X86/
DX86InstrExtension.td44 "movs{bw|x}\t{$src, $dst|$dst, $src}", [], IIC_MOVSX_R16_R8>,
48 "movs{bw|x}\t{$src, $dst|$dst, $src}", [], IIC_MOVSX_R16_M8>,
52 "movs{bl|x}\t{$src, $dst|$dst, $src}",
56 "movs{bl|x}\t{$src, $dst|$dst, $src}",
60 "movs{wl|x}\t{$src, $dst|$dst, $src}",
64 "movs{wl|x}\t{$src, $dst|$dst, $src}",
110 "movs{bl|x}\t{$src, $dst|$dst, $src} # NOREX",
115 "movs{bl|x}\t{$src, $dst|$dst, $src} # NOREX",
124 "movs{bq|x}\t{$src, $dst|$dst, $src}",
128 "movs{bq|x}\t{$src, $dst|$dst, $src}",
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrExtension.td42 "movs{bw|x}\t{$src, $dst|$dst, $src}", []>, TB, OpSize;
44 "movs{bw|x}\t{$src, $dst|$dst, $src}", []>, TB, OpSize;
46 "movs{bl|x}\t{$src, $dst|$dst, $src}",
49 "movs{bl|x}\t{$src, $dst|$dst, $src}",
52 "movs{wl|x}\t{$src, $dst|$dst, $src}",
55 "movs{wl|x}\t{$src, $dst|$dst, $src}",
93 "movs{bq|x}\t{$src, $dst|$dst, $src}",
96 "movs{bq|x}\t{$src, $dst|$dst, $src}",
99 "movs{wq|x}\t{$src, $dst|$dst, $src}",
102 "movs{wq|x}\t{$src, $dst|$dst, $src}",
[all …]
/external/llvm/test/CodeGen/Thumb/
Dthumb-shrink-wrapping.ll40 ; CHECK: movs r0, #0
88 ; CHECK: movs r0, #42
134 ; CHECK: movs [[SUM:r0]], #0
135 ; CHECK-NEXT: movs [[IV:r[0-9]+]], #10
139 ; CHECK: movs [[TMP:r[0-9]+]], #1
176 %call = tail call i32 asm sideeffect "movs $0, #1", "=r,~{r4}"()
205 ; CHECK: movs [[SUM:r0]], #0
206 ; CHECK-NEXT: movs [[IV:r[0-9]+]], #10
209 ; CHECK: movs [[TMP:r[0-9]+]], #1
230 %call = tail call i32 asm sideeffect "movs $0, #1", "=r,~{r4}"()
[all …]
/external/vixl/benchmarks/aarch32/
Dasm-disasm-speed-test.cc206 __ movs(Narrow, r3, 0U); in Generate_1() local
207 __ movs(Narrow, r5, 1U); in Generate_1() local
209 __ movs(Narrow, r0, 4U); in Generate_1() local
264 __ movs(Narrow, r3, 14U); in Generate_1() local
372 __ movs(Narrow, r3, 1U); in Generate_2() local
389 __ movs(Narrow, r1, 0U); in Generate_2() local
490 __ movs(Narrow, r3, 1U); in Generate_3() local
494 __ movs(Narrow, r1, 14U); in Generate_3() local
508 __ movs(Narrow, r2, 1U); in Generate_3() local
512 __ movs(Narrow, r1, 32U); in Generate_3() local
[all …]
/external/llvm/test/CodeGen/ARM/
Dload.ll176 ; CHECK-T1: movs r1, #31
188 ; CHECK-T1: movs r1, #62
261 ; CHECK-T1: movs r1, #32
273 ; CHECK-T1: movs r1, #64
285 ; CHECK-T1: movs r1, #32
297 ; CHECK-T1: movs r1, #64
309 ; CHECK-T1: movs r1, #128
320 ; CHECK-T1: movs r2, #32
332 ; CHECK-T1: movs r2, #64
344 ; CHECK-T1: movs r2, #128
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/
Difcvt-no-branch-predictor.ll31 ; CHECK-NOBP: movs
33 ; CHECK-NOBP: movs
52 ; CHECK: movs
54 ; CHECK: movs
56 ; CHECK: movs
133 ; CHECK: movs

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