/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | tls-relocs.s | 6 movz x1, #:dtprel_g2:var 8 movz x3, #:dtprel_g2:var 28 movz x5, #:dtprel_g1:var 30 movz w7, #:dtprel_g1:var 60 movz x11, #:dtprel_g0:var 62 movz w13, #:dtprel_g0:var 177 movz x15, #:gottprel_g1:var 178 movz w14, #:gottprel_g1:var 218 movz x3, #:tprel_g2:var 230 movz x5, #:tprel_g1:var [all …]
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D | arm64-tls-relocs.s | 9 movz x15, #:gottprel_g1:var 42 movz x3, #:tprel_g2:var 53 movz x5, #:tprel_g1:var 55 movz w7, #:tprel_g1:var 79 movz x11, #:tprel_g0:var 81 movz w13, #:tprel_g0:var 175 movz x3, #:dtprel_g2:var 186 movz x5, #:dtprel_g1:var 188 movz w7, #:dtprel_g1:var 212 movz x11, #:dtprel_g0:var [all …]
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D | elf-reloc-movw.s | 4 movz x0, #:abs_g0:some_label 7 movz x3, #:abs_g1:some_label 10 movz x3, #:abs_g2:some_label 13 movz x7, #:abs_g3:some_label 16 movz x13, #:abs_g0_s:some_label 19 movz x19, #:abs_g1_s:some_label 22 movz x19, #:abs_g2_s:some_label
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D | ilp32-diagnostics.s | 13 movz x7, #:abs_g3:some_label 18 movz x3, #:abs_g2:some_label 23 movz x19, #:abs_g2_s:some_label 33 movz x19, #:abs_g1_s:some_label 43 movz x3, #:dtprel_g2:var 53 movz x3, #:tprel_g2:var 63 movz x15, #:gottprel_g1:var
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D | arm64-large-relocs.s | 4 movz x2, #:abs_g0:sym 14 movz x4, #:abs_g1:sym 24 movz x6, #:abs_g2:sym 34 movz x8, #:abs_g3:sym
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D | arm64-aliases.s | 151 movz x0, #0 152 movz x0, #0, lsl #16 153 movz x0, #0, lsl #32 154 movz x0, #0, lsl #48 155 movz w0, #0 156 movz w0, #0, lsl #16 158 ; CHECK: movz x0, #0x0, lsl #16 159 ; CHECK: movz x0, #0x0, lsl #32 160 ; CHECK: movz x0, #0x0, lsl #48 162 ; CHECK: movz w0, #0x0, lsl #16 [all …]
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D | jump-table.s | 19 movz x0, #1 25 movz x0, #2 28 movz x0, #4 31 movz x0, #8
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/external/llvm/test/MC/AArch64/ |
D | tls-relocs.s | 6 movz x1, #:dtprel_g2:var 8 movz x3, #:dtprel_g2:var 28 movz x5, #:dtprel_g1:var 30 movz w7, #:dtprel_g1:var 60 movz x11, #:dtprel_g0:var 62 movz w13, #:dtprel_g0:var 177 movz x15, #:gottprel_g1:var 178 movz w14, #:gottprel_g1:var 218 movz x3, #:tprel_g2:var 230 movz x5, #:tprel_g1:var [all …]
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D | arm64-tls-relocs.s | 10 movz x15, #:gottprel_g1:var 43 movz x3, #:tprel_g2:var 54 movz x5, #:tprel_g1:var 56 movz w7, #:tprel_g1:var 80 movz x11, #:tprel_g0:var 82 movz w13, #:tprel_g0:var 167 movz x3, #:dtprel_g2:var 178 movz x5, #:dtprel_g1:var 180 movz w7, #:dtprel_g1:var 204 movz x11, #:dtprel_g0:var [all …]
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D | elf-reloc-movw.s | 4 movz x0, #:abs_g0:some_label 7 movz x3, #:abs_g1:some_label 10 movz x3, #:abs_g2:some_label 13 movz x7, #:abs_g3:some_label 16 movz x13, #:abs_g0_s:some_label 19 movz x19, #:abs_g1_s:some_label 22 movz x19, #:abs_g2_s:some_label
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D | arm64-large-relocs.s | 4 movz x2, #:abs_g0:sym 14 movz x4, #:abs_g1:sym 24 movz x6, #:abs_g2:sym 34 movz x8, #:abs_g3:sym
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D | arm64-aliases.s | 151 movz x0, #0 152 movz x0, #0, lsl #16 153 movz x0, #0, lsl #32 154 movz x0, #0, lsl #48 155 movz w0, #0 156 movz w0, #0, lsl #16 158 ; CHECK: movz x0, #0x0, lsl #16 159 ; CHECK: movz x0, #0x0, lsl #32 160 ; CHECK: movz x0, #0x0, lsl #48 162 ; CHECK: movz w0, #0x0, lsl #16 [all …]
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D | jump-table.s | 19 movz x0, #1 25 movz x0, #2 28 movz x0, #4 31 movz x0, #8
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/external/boringssl/src/crypto/fipsmodule/aes/asm/ |
D | aes-586.pl | 264 &movz ($s[2],&HB($s[0])); 269 &movz ($s[1],&HB($v1)); 277 &movz ($v0,&HB($v1)); 280 &movz ($v0,&HB($v1)); 289 &movz ($v1,&HB($v0)); 292 &movz ($v1,&HB($v0)); 301 &movz ($v0,&HB($v1)); 304 &movz ($v0,&HB($v1)); 316 &movz ($v0,&LB($s0)); # 3, 2, 1, 0* 319 &movz ($v0,&HB($s1)); # 7, 6, 5*, 4 [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | arm64-code-model-large-abs.ll | 11 ; The movz/movk calculation should end up returned directly in x0. 12 ; CHECK: movz x0, #:abs_g0_nc:var8 23 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g0_nc:var8 34 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g0_nc:var16 45 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g0_nc:var32 56 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g0_nc:var64 67 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g0_nc:[[CPADDR:.LCPI[0-9]+_[0-9]+]]
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D | code-model-large-abs.ll | 11 ; The movz/movk calculation should end up returned directly in x0. 12 ; CHECK: movz x0, #:abs_g0_nc:var8 23 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g0_nc:var8 34 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g0_nc:var16 45 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g0_nc:var32 56 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g0_nc:var64
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-code-model-large-abs.ll | 11 ; The movz/movk calculation should end up returned directly in x0. 12 ; CHECK: movz x0, #:abs_g3:var8 23 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var8 34 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var16 45 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var32 56 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var64 67 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:[[CPADDR:.LCPI[0-9]+_[0-9]+]]
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D | code-model-large-abs.ll | 11 ; The movz/movk calculation should end up returned directly in x0. 12 ; CHECK: movz x0, #:abs_g3:var8 23 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var8 34 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var16 45 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var32 56 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var64
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/ |
D | masked-iv-safe.ll | 7 ; CHECK-NOT: {{and|movz|sar|shl}} 9 ; CHECK-NOT: {{and|movz|sar|shl}} 40 ; CHECK-NOT: {{and|movz|sar|shl}} 42 ; CHECK-NOT: {{and|movz|sar|shl}} 73 ; CHECK-NOT: {{and|movz|sar|shl}} 75 ; CHECK-NOT: {{and|movz|sar|shl}} 108 ; CHECK-NOT: {{and|movz|sar|shl}} 110 ; CHECK-NOT: {{and|movz|sar|shl}} 143 ; CHECK-NOT: {{and|movz|sar|shl}} 145 ; CHECK-NOT: {{and|movz|sar|shl}} [all …]
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/external/llvm/test/CodeGen/X86/ |
D | masked-iv-safe.ll | 7 ; CHECK-NOT: {{and|movz|sar|shl}} 9 ; CHECK-NOT: {{and|movz|sar|shl}} 40 ; CHECK-NOT: {{and|movz|sar|shl}} 42 ; CHECK-NOT: {{and|movz|sar|shl}} 73 ; CHECK-NOT: {{and|movz|sar|shl}} 75 ; CHECK-NOT: {{and|movz|sar|shl}} 108 ; CHECK-NOT: {{and|movz|sar|shl}} 110 ; CHECK-NOT: {{and|movz|sar|shl}} 143 ; CHECK-NOT: {{and|movz|sar|shl}} 145 ; CHECK-NOT: {{and|movz|sar|shl}} [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86InstrExtension.td | 68 "movz{bw|x}\t{$src, $dst|$dst, $src}", []>, 72 "movz{bw|x}\t{$src, $dst|$dst, $src}", []>, 76 "movz{bl|x}\t{$src, $dst|$dst, $src}", 80 "movz{bl|x}\t{$src, $dst|$dst, $src}", 84 "movz{wl|x}\t{$src, $dst|$dst, $src}", 88 "movz{wl|x}\t{$src, $dst|$dst, $src}", 100 "movz{ww|x}\t{$src, $dst|$dst, $src}", 107 "movz{ww|x}\t{$src, $dst|$dst, $src}", 118 "movz{bl|x}\t{$src, $dst|$dst, $src}", 123 "movz{bl|x}\t{$src, $dst|$dst, $src}", [all …]
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/external/llvm/lib/Target/X86/ |
D | X86InstrExtension.td | 70 "movz{bw|x}\t{$src, $dst|$dst, $src}", [], IIC_MOVZX_R16_R8>, 74 "movz{bw|x}\t{$src, $dst|$dst, $src}", [], IIC_MOVZX_R16_M8>, 78 "movz{bl|x}\t{$src, $dst|$dst, $src}", 82 "movz{bl|x}\t{$src, $dst|$dst, $src}", 86 "movz{wl|x}\t{$src, $dst|$dst, $src}", 90 "movz{wl|x}\t{$src, $dst|$dst, $src}", 100 "movz{bl|x}\t{$src, $dst|$dst, $src} # NOREX", 105 "movz{bl|x}\t{$src, $dst|$dst, $src} # NOREX", 151 "movz{bq|x}\t{$src, $dst|$dst, $src}", [], IIC_MOVZX>, 155 "movz{bq|x}\t{$src, $dst|$dst, $src}", [], IIC_MOVZX>, [all …]
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86InstrExtension.td | 59 "movz{bw|x}\t{$src, $dst|$dst, $src}", []>, TB, OpSize; 61 "movz{bw|x}\t{$src, $dst|$dst, $src}", []>, TB, OpSize; 63 "movz{bl|x}\t{$src, $dst|$dst, $src}", 66 "movz{bl|x}\t{$src, $dst|$dst, $src}", 69 "movz{wl|x}\t{$src, $dst|$dst, $src}", 72 "movz{wl|x}\t{$src, $dst|$dst, $src}", 80 "movz{bl|x}\t{$src, $dst|$dst, $src}", 85 "movz{bl|x}\t{$src, $dst|$dst, $src}", 113 "movz{bq|x}\t{$src, $dst|$dst, $src}", []>, TB; 115 "movz{bq|x}\t{$src, $dst|$dst, $src}", []>, TB; [all …]
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/external/llvm/test/MC/Mips/ |
D | micromips-movcond-instructions.s | 12 # CHECK-EL: movz $9, $6, $7 # encoding: [0xe6,0x00,0x58,0x48] 19 # CHECK-EB: movz $9, $6, $7 # encoding: [0x00,0xe6,0x48,0x58] 23 movz $9, $6, $7
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/ |
D | zeroreg.ll | 38 ; 32-CMOV: movz $2, $zero, $4 44 ; 64-CMOV: movz $2, $zero, $4 90 ; 32-CMOV-DAG: movz $[[R0]], $zero, $4 91 ; 32-CMOV-DAG: movz $[[R1]], $zero, $4 100 ; 64-CMOV: movz $2, $zero, $4
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