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Searched refs:mpll_reg (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/drivers/clk/aspeed/
Dclk_ast2500.c52 static ulong ast2500_get_mpll_rate(ulong clkin, u32 mpll_reg) in ast2500_get_mpll_rate() argument
54 const ulong num = (mpll_reg & SCU_MPLL_NUM_MASK) >> SCU_MPLL_NUM_SHIFT; in ast2500_get_mpll_rate()
55 const ulong denum = (mpll_reg & SCU_MPLL_DENUM_MASK) in ast2500_get_mpll_rate()
57 const ulong post_div = (mpll_reg & SCU_MPLL_POST_MASK) in ast2500_get_mpll_rate()
223 u32 mpll_reg; in ast2500_configure_ddr() local
232 mpll_reg = readl(&scu->m_pll_param); in ast2500_configure_ddr()
233 mpll_reg &= ~(SCU_MPLL_POST_MASK | SCU_MPLL_NUM_MASK in ast2500_configure_ddr()
235 mpll_reg |= (div_cfg.post_div << SCU_MPLL_POST_SHIFT) in ast2500_configure_ddr()
240 writel(mpll_reg, &scu->m_pll_param); in ast2500_configure_ddr()
243 return ast2500_get_mpll_rate(clkin, mpll_reg); in ast2500_configure_ddr()