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Searched refs:mrc2 (Results 1 – 25 of 46) sorted by relevance

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/external/swiftshader/third_party/LLVM/test/CodeGen/ARM/
Dintrinsics.ll10 ; CHECK: mrc2
11 %1 = tail call i32 @llvm.arm.mrc2(i32 7, i32 1, i32 1, i32 1, i32 4) nounwind
35 declare i32 @llvm.arm.mrc2(i32, i32, i32, i32, i32) nounwind
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Dthumb2-diagnostics.s35 mrc2 p14, #8, r1, c1, c2, #4
36 mrc2 p14, #0, r1, c1, c2, #9
Ddiagnostics.s110 mrc2 p14, #8, r1, c1, c2, #4
111 mrc2 p14, #0, r1, c1, c2, #9
Dbasic-arm-instructions.s880 mrc2 p14, #0, r1, c1, c2, #4
883 @ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xfe]
/external/llvm/test/CodeGen/ARM/
Dintrinsics-coprocessor.ll10 ; CHECK: mrc2 p7, #1, r{{[0-9]+}}, c1, c1, #4
11 %1 = tail call i32 @llvm.arm.mrc2(i32 7, i32 1, i32 1, i32 1, i32 4) nounwind
71 declare i32 @llvm.arm.mrc2(i32, i32, i32, i32, i32) nounwind
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dintrinsics-coprocessor.ll9 ; CHECK: mrc2 p7, #1, r{{[0-9]+}}, c1, c1, #4
10 %1 = tail call i32 @llvm.arm.mrc2(i32 7, i32 1, i32 1, i32 1, i32 4) nounwind
70 declare i32 @llvm.arm.mrc2(i32, i32, i32, i32, i32) nounwind
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dinvalid-thumbv8.txt64 # CHECK-V7: mrc2
69 # CHECK-V7: mrc2
74 # CHECK-V7: mrc2
Dinvalid-armv8.txt64 # CHECK-V7: mrc2
69 # CHECK-V7: mrc2
74 # CHECK-V7: mrc2
Dbasic-arm-instructions.txt816 # CHECK: mrc2 p14, #0, r1, c1, c2, #4
817 # CHECK: mrc2 p9, #7, apsr_nzcv, c15, c0, #1
/external/llvm/test/MC/Disassembler/ARM/
Dinvalid-armv8.txt64 # CHECK-V7: mrc2
69 # CHECK-V7: mrc2
74 # CHECK-V7: mrc2
Dinvalid-thumbv8.txt64 # CHECK-V7: mrc2
69 # CHECK-V7: mrc2
74 # CHECK-V7: mrc2
Dbasic-arm-instructions.txt816 # CHECK: mrc2 p14, #0, r1, c1, c2, #4
817 # CHECK: mrc2 p9, #7, apsr_nzcv, c15, c0, #1
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/
Dintrinsics-coprocessor.ll8 ; CHECK: mrc2 p7, #1, r{{[0-9]+}}, c1, c1, #4
9 %1 = tail call i32 @llvm.arm.mrc2(i32 7, i32 1, i32 1, i32 1, i32 4) nounwind
85 declare i32 @llvm.arm.mrc2(i32, i32, i32, i32, i32) nounwind
/external/clang/test/CodeGen/
Dbuiltins-arm.c166 unsigned mrc2() { in mrc2() function
/external/llvm/test/MC/ARM/
Dthumb2-diagnostics.s38 mrc2 p14, #8, r1, c1, c2, #4
39 mrc2 p14, #0, r1, c1, c2, #9
Ddiagnostics.s178 mrc2 p14, #8, r1, c1, c2, #4
179 mrc2 p14, #0, r1, c1, c2, #9
Dbasic-thumb2-instructions.s1523 mrc2 p12, #3, r3, c3, c4
1524 mrc2 p14, #0, r1, c1, c2, #4
1525 mrc2 p8, #7, apsr_nzcv, c15, c0, #1
1530 @ CHECK: mrc2 p12, #3, r3, c3, c4, #0 @ encoding: [0x73,0xfe,0x14,0x3c]
1531 @ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xfe,0x92,0x1e]
1532 @ CHECK: mrc2 p8, #7, apsr_nzcv, c15, c0, #1 @ encoding: [0xff,0xfe,0x30,0xf8]
Dbasic-arm-instructions.s1384 mrc2 p14, #0, r1, c1, c2, #4
1385 mrc2 p9, #7, apsr_nzcv, c15, c0, #1
1389 @ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xfe]
1390 @ CHECK: mrc2 p9, #7, apsr_nzcv, c15, c0, #1 @ encoding: [0x30,0xf9,0xff,0xfe]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dthumb2-diagnostics.s38 mrc2 p14, #8, r1, c1, c2, #4
39 mrc2 p14, #0, r1, c1, c2, #9
Ddiagnostics.s204 mrc2 p14, #8, r1, c1, c2, #4
205 mrc2 p14, #0, r1, c1, c2, #9
Dbasic-thumb2-instructions.s1571 mrc2 p12, #3, r3, c3, c4
1572 mrc2 p14, #0, r1, c1, c2, #4
1573 mrc2 p8, #7, apsr_nzcv, c15, c0, #1
1578 @ CHECK: mrc2 p12, #3, r3, c3, c4, #0 @ encoding: [0x73,0xfe,0x14,0x3c]
1579 @ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x11,0xfe,0x92,0x1e]
1580 @ CHECK: mrc2 p8, #7, apsr_nzcv, c15, c0, #1 @ encoding: [0xff,0xfe,0x30,0xf8]
Dbasic-arm-instructions.s1386 mrc2 p14, #0, r1, c1, c2, #4
1387 mrc2 p9, #7, apsr_nzcv, c15, c0, #1
1391 @ CHECK: mrc2 p14, #0, r1, c1, c2, #4 @ encoding: [0x92,0x1e,0x11,0xfe]
1392 @ CHECK: mrc2 p9, #7, apsr_nzcv, c15, c0, #1 @ encoding: [0x30,0xf9,0xff,0xfe]
/external/capstone/suite/MC/ARM/
Dbasic-thumb2-instructions.s.cs483 0x73,0xfe,0x14,0x3c = mrc2 p12, #3, r3, c3, c4, #0
484 0x11,0xfe,0x92,0x1e = mrc2 p14, #0, r1, c1, c2, #4
485 0xff,0xfe,0x30,0xf8 = mrc2 p8, #7, apsr_nzcv, c15, c0, #1
Dbasic-arm-instructions.s.cs379 0x92,0x1e,0x11,0xfe = mrc2 p14, #0, r1, c1, c2, #4
380 0x30,0xf9,0xff,0xfe = mrc2 p9, #7, apsr_nzcv, c15, c0, #1
/external/v8/src/arm/
Dassembler-arm.h983 void mrc2(Coprocessor coproc, int opcode_1,

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