| /external/capstone/suite/MC/AArch64/ |
| D | trace-regs.s.cs | 2 0x08,0x03,0x31,0xd5 = mrs x8, trcstatr
3 0xc9,0x00,0x31,0xd5 = mrs x9, trcidr8
4 0xcb,0x01,0x31,0xd5 = mrs x11, trcidr9
5 0xd9,0x02,0x31,0xd5 = mrs x25, trcidr10
6 0xc7,0x03,0x31,0xd5 = mrs x7, trcidr11
7 0xc7,0x04,0x31,0xd5 = mrs x7, trcidr12
8 0xc6,0x05,0x31,0xd5 = mrs x6, trcidr13
9 0xfb,0x08,0x31,0xd5 = mrs x27, trcidr0
10 0xfd,0x09,0x31,0xd5 = mrs x29, trcidr1
11 0xe4,0x0a,0x31,0xd5 = mrs x4, trcidr2
[all …]
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| D | gicv3-regs.s.cs | 2 0x08,0xcc,0x38,0xd5 = mrs x8, icc_iar1_el1
3 0x1a,0xc8,0x38,0xd5 = mrs x26, icc_iar0_el1
4 0x42,0xcc,0x38,0xd5 = mrs x2, icc_hppir1_el1
5 0x51,0xc8,0x38,0xd5 = mrs x17, icc_hppir0_el1
6 0x7d,0xcb,0x38,0xd5 = mrs x29, icc_rpr_el1
7 0x24,0xcb,0x3c,0xd5 = mrs x4, ich_vtr_el2
8 0x78,0xcb,0x3c,0xd5 = mrs x24, ich_eisr_el2
9 0xa9,0xcb,0x3c,0xd5 = mrs x9, ich_elsr_el2
10 0x78,0xcc,0x38,0xd5 = mrs x24, icc_bpr1_el1
11 0x6e,0xc8,0x38,0xd5 = mrs x14, icc_bpr0_el1
[all …]
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| D | basic-a64-instructions.s.cs | 1706 0x69,0x42,0x38,0xd5 = mrs x9, pan
1707 0x89,0x42,0x38,0xd5 = mrs x9, uao
1708 0x09,0x00,0x32,0xd5 = mrs x9, teecr32_el1
1709 0x49,0x00,0x30,0xd5 = mrs x9, osdtrrx_el1
1710 0x09,0x01,0x33,0xd5 = mrs x9, mdccsr_el0
1711 0x09,0x02,0x30,0xd5 = mrs x9, mdccint_el1
1712 0x49,0x02,0x30,0xd5 = mrs x9, mdscr_el1
1713 0x49,0x03,0x30,0xd5 = mrs x9, osdtrtx_el1
1714 0x09,0x04,0x33,0xd5 = mrs x9, dbgdtr_el0
1715 0x09,0x05,0x33,0xd5 = mrs x9, dbgdtrrx_el0
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | trace-regs.s | 3 mrs x8, trcstatr
4 mrs x9, trcidr8
5 mrs x11, trcidr9
6 mrs x25, trcidr10
7 mrs x7, trcidr11
8 mrs x7, trcidr12
9 mrs x6, trcidr13
10 mrs x27, trcidr0
11 mrs x29, trcidr1
12 mrs x4, trcidr2
[all …]
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| D | arm64-system-encoding.s | 222 mrs x3, ACTLR_EL1
223 mrs x3, ACTLR_EL2
224 mrs x3, ACTLR_EL3
225 mrs x3, AFSR0_EL1
226 mrs x3, AFSR0_EL2
227 mrs x3, AFSR0_EL3
228 mrs x3, AIDR_EL1
229 mrs x3, AFSR1_EL1
230 mrs x3, AFSR1_EL2
231 mrs x3, AFSR1_EL3
[all …]
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| D | gicv3-regs.s | 3 mrs x8, icc_iar1_el1
4 mrs x26, icc_iar0_el1
5 mrs x2, icc_hppir1_el1
6 mrs x17, icc_hppir0_el1
7 mrs x29, icc_rpr_el1
8 mrs x4, ich_vtr_el2
9 mrs x24, ich_eisr_el2
10 mrs x9, ich_elrsr_el2
11 mrs x24, icc_bpr1_el1
12 mrs x14, icc_bpr0_el1
[all …]
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| D | armv8.4a-actmon.s | 58 mrs x0, AMCR_EL0 label
59 mrs x0, AMCFGR_EL0 label
60 mrs x0, AMCGCR_EL0 label
61 mrs x0, AMUSERENR_EL0 label
62 mrs x0, AMCNTENCLR0_EL0 label
63 mrs x0, AMCNTENSET0_EL0 label
64 mrs x0, AMEVCNTR00_EL0 label
65 mrs x0, AMEVCNTR01_EL0 label
66 mrs x0, AMEVCNTR02_EL0 label
67 mrs x0, AMEVCNTR03_EL0 label
[all …]
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| D | basic-a64-instructions.s | 4194 mrs x9, TEECR32_EL1
4195 mrs x9, OSDTRRX_EL1
4196 mrs x9, MDCCSR_EL0
4197 mrs x9, MDCCINT_EL1
4198 mrs x9, MDSCR_EL1
4199 mrs x9, OSDTRTX_EL1
4200 mrs x9, DBGDTR_EL0
4201 mrs x9, DBGDTRRX_EL0
4202 mrs x9, OSECCR_EL1
4203 mrs x9, DBGVCR32_EL2
[all …]
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| D | armv8.4a-mpam.s | 26 mrs x0, MPAM0_EL1 label
27 mrs x0, MPAM1_EL1 label
28 mrs x0, MPAM2_EL2 label
29 mrs x0, MPAM3_EL3 label
30 mrs x0, MPAM1_EL12 label
31 mrs x0, MPAMHCR_EL2 label
32 mrs x0, MPAMVPMV_EL2 label
33 mrs x0, MPAMVPM0_EL2 label
34 mrs x0, MPAMVPM1_EL2 label
35 mrs x0, MPAMVPM2_EL2 label
[all …]
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| /external/llvm/test/MC/AArch64/ |
| D | trace-regs.s | 3 mrs x8, trcstatr
4 mrs x9, trcidr8
5 mrs x11, trcidr9
6 mrs x25, trcidr10
7 mrs x7, trcidr11
8 mrs x7, trcidr12
9 mrs x6, trcidr13
10 mrs x27, trcidr0
11 mrs x29, trcidr1
12 mrs x4, trcidr2
[all …]
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| D | arm64-system-encoding.s | 221 mrs x3, ACTLR_EL1
222 mrs x3, ACTLR_EL2
223 mrs x3, ACTLR_EL3
224 mrs x3, AFSR0_EL1
225 mrs x3, AFSR0_EL2
226 mrs x3, AFSR0_EL3
227 mrs x3, AIDR_EL1
228 mrs x3, AFSR1_EL1
229 mrs x3, AFSR1_EL2
230 mrs x3, AFSR1_EL3
[all …]
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| D | gicv3-regs.s | 3 mrs x8, icc_iar1_el1
4 mrs x26, icc_iar0_el1
5 mrs x2, icc_hppir1_el1
6 mrs x17, icc_hppir0_el1
7 mrs x29, icc_rpr_el1
8 mrs x4, ich_vtr_el2
9 mrs x24, ich_eisr_el2
10 mrs x9, ich_elsr_el2
11 mrs x24, icc_bpr1_el1
12 mrs x14, icc_bpr0_el1
[all …]
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| D | basic-a64-instructions.s | 4211 mrs x9, TEECR32_EL1
4212 mrs x9, OSDTRRX_EL1
4213 mrs x9, MDCCSR_EL0
4214 mrs x9, MDCCINT_EL1
4215 mrs x9, MDSCR_EL1
4216 mrs x9, OSDTRTX_EL1
4217 mrs x9, DBGDTR_EL0
4218 mrs x9, DBGDTRRX_EL0
4219 mrs x9, OSECCR_EL1
4220 mrs x9, DBGVCR32_EL2
[all …]
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| /external/llvm/test/MC/ARM/ |
| D | move-banked-regs.s | 4 mrs r2, r8_usr
5 mrs r3, r9_usr
6 mrs r5, r10_usr
7 mrs r7, r11_usr
8 mrs r11, r12_usr
9 mrs r1, sp_usr
10 mrs r2, lr_usr
11 @ CHECK-ARM: mrs r2, r8_usr @ encoding: [0x00,0x22,0x00,0xe1]
12 @ CHECK-ARM: mrs r3, r9_usr @ encoding: [0x00,0x32,0x01,0xe1]
13 @ CHECK-ARM: mrs r5, r10_usr @ encoding: [0x00,0x52,0x02,0xe1]
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | move-banked-regs.s | 4 mrs r2, r8_usr
5 mrs r3, r9_usr
6 mrs r5, r10_usr
7 mrs r7, r11_usr
8 mrs r11, r12_usr
9 mrs r1, sp_usr
10 mrs r2, lr_usr
11 @ CHECK-ARM: mrs r2, r8_usr @ encoding: [0x00,0x22,0x00,0xe1]
12 @ CHECK-ARM: mrs r3, r9_usr @ encoding: [0x00,0x32,0x01,0xe1]
13 @ CHECK-ARM: mrs r5, r10_usr @ encoding: [0x00,0x52,0x02,0xe1]
[all …]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | armv8.4a-actmon.txt | 139 #CHECK: mrs x0, AMCR_EL0
140 #CHECK: mrs x0, AMCFGR_EL0
141 #CHECK: mrs x0, AMCGCR_EL0
142 #CHECK: mrs x0, AMUSERENR_EL0
143 #CHECK: mrs x0, AMCNTENCLR0_EL0
144 #CHECK: mrs x0, AMCNTENSET0_EL0
145 #CHECK: mrs x0, AMEVCNTR00_EL0
146 #CHECK: mrs x0, AMEVCNTR01_EL0
147 #CHECK: mrs x0, AMEVCNTR02_EL0
148 #CHECK: mrs x0, AMEVCNTR03_EL0
[all …]
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| D | trace-regs.txt | 5 # CHECK: mrs x8, {{trcstatr|TRCSTATR}}
7 # CHECK: mrs x9, {{trcidr8|TRCIDR8}}
9 # CHECK: mrs x11, {{trcidr9|TRCIDR9}}
11 # CHECK: mrs x25, {{trcidr10|TRCIDR10}}
13 # CHECK: mrs x7, {{trcidr11|TRCIDR11}}
15 # CHECK: mrs x7, {{trcidr12|TRCIDR12}}
17 # CHECK: mrs x6, {{trcidr13|TRCIDR13}}
19 # CHECK: mrs x27, {{trcidr0|TRCIDR0}}
21 # CHECK: mrs x29, {{trcidr1|TRCIDR1}}
23 # CHECK: mrs x4, {{trcidr2|TRCIDR2}}
[all …]
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| D | armv8.4a-mpam.txt | 51 #CHECK: mrs x0, MPAM0_EL1
52 #CHECK: mrs x0, MPAM1_EL1
53 #CHECK: mrs x0, MPAM2_EL2
54 #CHECK: mrs x0, MPAM3_EL3
55 #CHECK: mrs x0, MPAM1_EL12
56 #CHECK: mrs x0, MPAMHCR_EL2
57 #CHECK: mrs x0, MPAMVPMV_EL2
58 #CHECK: mrs x0, MPAMVPM0_EL2
59 #CHECK: mrs x0, MPAMVPM1_EL2
60 #CHECK: mrs x0, MPAMVPM2_EL2
[all …]
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| D | gicv3-regs.txt | 5 # CHECK: mrs x8, {{icc_iar1_el1|ICC_IAR1_EL1}}
7 # CHECK: mrs x26, {{icc_iar0_el1|ICC_IAR0_EL1}}
9 # CHECK: mrs x2, {{icc_hppir1_el1|ICC_HPPIR1_EL1}}
11 # CHECK: mrs x17, {{icc_hppir0_el1|ICC_HPPIR0_EL1}}
13 # CHECK: mrs x29, {{icc_rpr_el1|ICC_RPR_EL1}}
15 # CHECK: mrs x4, {{ich_vtr_el2|ICH_VTR_EL2}}
17 # CHECK: mrs x24, {{ich_eisr_el2|ICH_EISR_EL2}}
19 # CHECK: mrs x9, {{ich_elrsr_el2|ICH_ELRSR_EL2}}
21 # CHECK: mrs x24, {{icc_bpr1_el1|ICC_BPR1_EL1}}
23 # CHECK: mrs x14, {{icc_bpr0_el1|ICC_BPR0_EL1}}
[all …]
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| D | armv8.2a-statistical-profiling.txt | 62 # CHECK: mrs x0, PMBLIMITR_EL1
63 # NO_SPE: mrs x0, S3_0_C9_C10_0
64 # CHECK: mrs x0, PMBPTR_EL1
65 # NO_SPE: mrs x0, S3_0_C9_C10_1
66 # CHECK: mrs x0, PMBSR_EL1
67 # NO_SPE: mrs x0, S3_0_C9_C10_3
68 # CHECK: mrs x0, PMBIDR_EL1
69 # NO_SPE: mrs x0, S3_0_C9_C10_7
70 # CHECK: mrs x0, PMSCR_EL2
71 # NO_SPE: mrs x0, S3_4_C9_C9_0
[all …]
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | trace-regs.txt | 5 # CHECK: mrs x8, {{trcstatr|TRCSTATR}}
7 # CHECK: mrs x9, {{trcidr8|TRCIDR8}}
9 # CHECK: mrs x11, {{trcidr9|TRCIDR9}}
11 # CHECK: mrs x25, {{trcidr10|TRCIDR10}}
13 # CHECK: mrs x7, {{trcidr11|TRCIDR11}}
15 # CHECK: mrs x7, {{trcidr12|TRCIDR12}}
17 # CHECK: mrs x6, {{trcidr13|TRCIDR13}}
19 # CHECK: mrs x27, {{trcidr0|TRCIDR0}}
21 # CHECK: mrs x29, {{trcidr1|TRCIDR1}}
23 # CHECK: mrs x4, {{trcidr2|TRCIDR2}}
[all …]
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| D | gicv3-regs.txt | 5 # CHECK: mrs x8, {{icc_iar1_el1|ICC_IAR1_EL1}}
7 # CHECK: mrs x26, {{icc_iar0_el1|ICC_IAR0_EL1}}
9 # CHECK: mrs x2, {{icc_hppir1_el1|ICC_HPPIR1_EL1}}
11 # CHECK: mrs x17, {{icc_hppir0_el1|ICC_HPPIR0_EL1}}
13 # CHECK: mrs x29, {{icc_rpr_el1|ICC_RPR_EL1}}
15 # CHECK: mrs x4, {{ich_vtr_el2|ICH_VTR_EL2}}
17 # CHECK: mrs x24, {{ich_eisr_el2|ICH_EISR_EL2}}
19 # CHECK: mrs x9, {{ich_elsr_el2|ICH_ELSR_EL2}}
21 # CHECK: mrs x24, {{icc_bpr1_el1|ICC_BPR1_EL1}}
23 # CHECK: mrs x14, {{icc_bpr0_el1|ICC_BPR0_EL1}}
[all …]
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| D | armv8.2a-statistical-profiling.txt | 62 # CHECK: mrs x0, PMBLIMITR_EL1
63 # NO_SPE: mrs x0, S3_0_C9_C10_0
64 # CHECK: mrs x0, PMBPTR_EL1
65 # NO_SPE: mrs x0, S3_0_C9_C10_1
66 # CHECK: mrs x0, PMBSR_EL1
67 # NO_SPE: mrs x0, S3_0_C9_C10_3
68 # CHECK: mrs x0, PMBIDR_EL1
69 # NO_SPE: mrs x0, S3_0_C9_C10_7
70 # CHECK: mrs x0, PMSCR_EL2
71 # NO_SPE: mrs x0, S3_4_C9_C9_0
[all …]
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| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | thumb2-mclass.s | 12 mrs r0, apsr
13 mrs r0, iapsr
14 mrs r0, eapsr
15 mrs r0, xpsr
16 mrs r0, ipsr
17 mrs r0, epsr
18 mrs r0, iepsr
19 mrs r0, msp
20 mrs r0, psp
21 mrs r0, primask
[all …]
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | move-banked-regs-thumb.txt | 10 @ CHECK: mrs r2, r8_usr
11 @ CHECK: mrs r3, r9_usr
12 @ CHECK: mrs r5, r10_usr
13 @ CHECK: mrs r7, r11_usr
14 @ CHECK: mrs r11, r12_usr
15 @ CHECK: mrs r1, sp_usr
16 @ CHECK: mrs r2, lr_usr
26 @ CHECK: mrs r2, r8_fiq
27 @ CHECK: mrs r3, r9_fiq
28 @ CHECK: mrs r5, r10_fiq
[all …]
|