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Searched refs:msg_port_write (Results 1 – 8 of 8) sorted by relevance

/external/u-boot/arch/x86/cpu/quark/
Dhte.c22 msg_port_write(HTE, 0x000200a2, 0xffffffff); in hte_enable_all_errors()
23 msg_port_write(HTE, 0x000200a3, 0x000000ff); in hte_enable_all_errors()
24 msg_port_write(HTE, 0x000200a4, 0x00000000); in hte_enable_all_errors()
51 msg_port_write(HTE, 0x00020011, tmp); in hte_wait_for_complete()
69 msg_port_write(HTE, 0x000200a1, tmp); in hte_clear_error_regs()
93 msg_port_write(HTE, 0x00020020, 0x01b10021); in hte_basic_data_cmp()
94 msg_port_write(HTE, 0x00020021, 0x06000000); in hte_basic_data_cmp()
95 msg_port_write(HTE, 0x00020022, addr >> 6); in hte_basic_data_cmp()
96 msg_port_write(HTE, 0x00020062, 0x00800015); in hte_basic_data_cmp()
97 msg_port_write(HTE, 0x00020063, 0xaaaaaaaa); in hte_basic_data_cmp()
[all …]
Dquark.c27 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_FIX_16K_A0000, in quark_setup_mtrr()
29 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_FIX_16K_B0000, in quark_setup_mtrr()
33 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_FIX_64K_00000, in quark_setup_mtrr()
35 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_FIX_64K_40000, in quark_setup_mtrr()
37 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_FIX_16K_80000, in quark_setup_mtrr()
39 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_FIX_16K_90000, in quark_setup_mtrr()
42 msg_port_write(MSG_PORT_HOST_BRIDGE, i, in quark_setup_mtrr()
48 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYBASE(MTRR_VAR_ROM), in quark_setup_mtrr()
50 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYMASK(MTRR_VAR_ROM), in quark_setup_mtrr()
56 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYBASE(MTRR_VAR_ESRAM), in quark_setup_mtrr()
[all …]
Dsmc.c166 msg_port_write(MEM_CTLR, DTR0, dtr0); in prog_ddr_timing_control()
167 msg_port_write(MEM_CTLR, DTR1, dtr1); in prog_ddr_timing_control()
168 msg_port_write(MEM_CTLR, DTR2, dtr2); in prog_ddr_timing_control()
169 msg_port_write(MEM_CTLR, DTR3, dtr3); in prog_ddr_timing_control()
170 msg_port_write(MEM_CTLR, DTR4, dtr4); in prog_ddr_timing_control()
191 msg_port_write(MEM_CTLR, DPMC0, dpmc0); in prog_decode_before_jedec()
196 msg_port_write(MEM_CTLR, DSCH, dsch); in prog_decode_before_jedec()
201 msg_port_write(MEM_CTLR, DRFC, drfc); in prog_decode_before_jedec()
207 msg_port_write(MEM_CTLR, DCAL, dcal); in prog_decode_before_jedec()
218 msg_port_write(MEM_CTLR, DRP, drp); in prog_decode_before_jedec()
[all …]
Dcar.S29 jmp msg_port_write
36 jmp msg_port_write
74 msg_port_write: label
Ddram.c146 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYBASE(MTRR_VAR_RAM), in dram_init()
148 msg_port_write(MSG_PORT_HOST_BRIDGE, MTRR_VAR_PHYMASK(MTRR_VAR_RAM), in dram_init()
Dmsg_port.c30 void msg_port_write(u8 port, u32 reg, u32 value) in msg_port_write() function
Dmrc_util.c33 msg_port_write(unit, addr, in mrc_write_mask()
84 msg_port_write(MEM_CTLR, DCO, dco); in select_mem_mgr()
98 msg_port_write(MEM_CTLR, DCO, dco); in select_hte()
/external/u-boot/arch/x86/include/asm/arch-quark/
Dmsg_port.h63 void msg_port_write(u8 port, u32 reg, u32 value);
106 #define msg_port_normal_write msg_port_write