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Searched refs:mstp_clrbits_le32 (Results 1 – 22 of 22) sorted by relevance

/external/u-boot/board/renesas/salvator-x/
Dsalvator-x.c57 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124); in board_early_init_f()
61 mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926); in board_early_init_f()
92 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, GSX_MSTP112); in board_init()
99 mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704); in board_init()
/external/u-boot/board/renesas/ulcb/
Dulcb.c56 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124); in board_early_init_f()
60 mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926); in board_early_init_f()
87 mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704); in board_init()
/external/u-boot/board/renesas/draak/
Ddraak.c56 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125 | TMU1_MSTP124); in board_early_init_f()
60 mstp_clrbits_le32(MSTPSR9, SMSTPCR9, DVFS_MSTP926); in board_early_init_f()
87 mstp_clrbits_le32(MSTPSR7, SMSTPCR7, HSUSB_MSTP704); in board_init()
/external/u-boot/board/renesas/lager/
Dlager_spl.c320 mstp_clrbits_le32(MSTPSR9, SMSTPCR9, QSPI_MSTP917); in spl_init_qspi()
343 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); in board_init_f()
344 mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP721); in board_init_f()
Dlager.c67 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); in board_early_init_f()
/external/u-boot/board/renesas/gose/
Dgose_spl.c332 mstp_clrbits_le32(MSTPSR9, SMSTPCR9, QSPI_MSTP917); in spl_init_qspi()
355 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); in board_init_f()
356 mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP721); in board_init_f()
Dgose.c56 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); in board_early_init_f()
/external/u-boot/board/renesas/alt/
Dalt_spl.c338 mstp_clrbits_le32(MSTPSR9, SMSTPCR9, QSPI_MSTP917); in spl_init_qspi()
361 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); in board_init_f()
362 mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF2_MSTP719); in board_init_f()
Dalt.c54 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); in board_early_init_f()
/external/u-boot/board/renesas/koelsch/
Dkoelsch_spl.c327 mstp_clrbits_le32(MSTPSR9, SMSTPCR9, QSPI_MSTP917); in spl_init_qspi()
352 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); in board_init_f()
353 mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP721); in board_init_f()
Dkoelsch.c58 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); in board_early_init_f()
/external/u-boot/board/renesas/silk/
Dsilk_spl.c352 mstp_clrbits_le32(MSTPSR9, SMSTPCR9, QSPI_MSTP917); in spl_init_qspi()
375 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); in board_init_f()
376 mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF2_MSTP719); in board_init_f()
Dsilk.c54 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); in board_early_init_f()
/external/u-boot/board/renesas/porter/
Dporter_spl.c415 mstp_clrbits_le32(MSTPSR9, SMSTPCR9, QSPI_MSTP917); in spl_init_qspi()
438 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); in board_init_f()
439 mstp_clrbits_le32(MSTPSR7, SMSTPCR7, SCIF0_MSTP721); in board_init_f()
Dporter.c57 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); in board_early_init_f()
/external/u-boot/board/renesas/stout/
Dstout_spl.c401 mstp_clrbits_le32(MSTPSR9, SMSTPCR9, QSPI_MSTP917); in spl_init_qspi()
424 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); in board_init_f()
425 mstp_clrbits_le32(MSTPSR2, SMSTPCR2, SCIFA0_MSTP204); in board_init_f()
Dstout.c69 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); in board_early_init_f()
/external/u-boot/board/renesas/blanche/
Dblanche.c299 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); in board_early_init_f()
301 mstp_clrbits_le32(MSTPSR9, SMSTPCR9, QSPI_MSTP917); in board_early_init_f()
/external/u-boot/board/renesas/ebisu/
Debisu.c38 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); in board_early_init_f()
/external/u-boot/board/renesas/eagle/
Deagle.c62 mstp_clrbits_le32(MSTPSR1, SMSTPCR1, TMU0_MSTP125); in board_early_init_f()
/external/u-boot/board/renesas/rcar-common/
Dcommon.c53 mstp_clrbits_le32(TMU_BASE + TSTR0, TMU_BASE + TSTR0, TSTR0_STR0); in arch_preboot_os()
/external/u-boot/arch/arm/mach-rmobile/include/mach/
Drcar-mstp.h20 #define mstp_clrbits_le32(addr, saddr, clear) \ macro