| /external/libvpx/libvpx/vpx_dsp/mips/ |
| D | sum_squares_msa.c | 18 v4i32 mul0, mul1; in vpx_sum_squares_2d_i16_msa() local
29 DOTP_SH2_SW(diff0, diff1, diff0, diff1, mul0, mul1); in vpx_sum_squares_2d_i16_msa()
30 mul0 += mul1; in vpx_sum_squares_2d_i16_msa()
31 res0 = __msa_hadd_s_d(mul0, mul0); in vpx_sum_squares_2d_i16_msa()
38 DOTP_SH2_SW(src0, src1, src0, src1, mul0, mul1); in vpx_sum_squares_2d_i16_msa()
39 DPADD_SH2_SW(src2, src3, src2, src3, mul0, mul1); in vpx_sum_squares_2d_i16_msa()
40 DPADD_SH2_SW(src4, src5, src4, src5, mul0, mul1); in vpx_sum_squares_2d_i16_msa()
41 DPADD_SH2_SW(src6, src7, src6, src7, mul0, mul1); in vpx_sum_squares_2d_i16_msa()
42 mul0 += mul1; in vpx_sum_squares_2d_i16_msa()
43 res0 = __msa_hadd_s_d(mul0, mul0); in vpx_sum_squares_2d_i16_msa()
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| D | deblock_msa.c | 550 v4i32 mul0, mul1, mul2, mul3; in vpx_mbpost_proc_across_ip_msa() local
580 MUL4(sum0_w, sub0, sum1_w, sub1, sum2_w, sub2, sum3_w, sub3, mul0, mul1, in vpx_mbpost_proc_across_ip_msa()
582 sum_sq0[0] = sum_sq + mul0[0]; in vpx_mbpost_proc_across_ip_msa()
584 sum_sq0[cnt + 1] = sum_sq0[cnt] + mul0[cnt + 1]; in vpx_mbpost_proc_across_ip_msa()
655 v4i32 mul0 = { 0 }; in vpx_mbpost_proc_down_msa() local
680 mul0 += (v4i32)__msa_ilvr_h((v8i16)zero, (v8i16)mult0); in vpx_mbpost_proc_down_msa()
706 mul0 += add0 * sub0; in vpx_mbpost_proc_down_msa()
718 total0 = mul0 * __msa_ldi_w(15); in vpx_mbpost_proc_down_msa()
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| /external/llvm/test/Transforms/StraightLineStrengthReduce/ |
| D | slsr-mul.ll | 8 %mul0 = mul i32 %b, %s
11 call void @foo(i32 %mul0)
29 %mul0 = mul i32 %b, %s
32 call void @foo(i32 %mul0)
51 %mul0 = mul i32 %b, %s
53 call void @foo(i32 %mul0)
78 %mul0 = mul i32 %a, %b
85 call void @foo(i32 %mul0)
99 ; mul0 = b * s;
101 ; mul1 = mul0 + bump; // GVN ensures mul1 and mul2 use the same bump.
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/StraightLineStrengthReduce/ |
| D | slsr-mul.ll | 8 %mul0 = mul i32 %b, %s
11 call void @foo(i32 %mul0)
29 %mul0 = mul i32 %b, %s
32 call void @foo(i32 %mul0)
51 %mul0 = mul i32 %b, %s
53 call void @foo(i32 %mul0)
78 %mul0 = mul i32 %a, %b
85 call void @foo(i32 %mul0)
99 ; mul0 = b * s;
101 ; mul1 = mul0 + bump; // GVN ensures mul1 and mul2 use the same bump.
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| /external/libvpx/libvpx/vp8/common/mips/msa/ |
| D | idct_msa.c | 180 v8i16 input0, input1, dequant_in0, dequant_in1, mul0, mul1; in dequant_idct4x4_addblk_msa() local
188 MUL2(input0, dequant_in0, input1, dequant_in1, mul0, mul1); in dequant_idct4x4_addblk_msa()
189 PCKEV_D2_SH(zero, mul0, zero, mul1, in0, in2); in dequant_idct4x4_addblk_msa()
190 PCKOD_D2_SH(zero, mul0, zero, mul1, in1, in3); in dequant_idct4x4_addblk_msa()
192 PCKEV_D2_SH(hz1_h, hz0_h, hz3_h, hz2_h, mul0, mul1); in dequant_idct4x4_addblk_msa()
193 UNPCK_SH_SW(mul0, hz0_w, hz1_w); in dequant_idct4x4_addblk_msa()
218 v8i16 in0, in1, in2, in3, mul0, mul1, mul2, mul3, dequant_in0, dequant_in1; in dequant_idct4x4_addblk_2x_msa() local
227 mul0, mul1, mul2, mul3); in dequant_idct4x4_addblk_2x_msa()
228 PCKEV_D2_SH(mul2, mul0, mul3, mul1, in0, in2); in dequant_idct4x4_addblk_2x_msa()
229 PCKOD_D2_SH(mul2, mul0, mul3, mul1, in1, in3); in dequant_idct4x4_addblk_2x_msa()
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| /external/boringssl/src/crypto/fipsmodule/bn/asm/ |
| D | x86-mont.pl | 145 $mul0="mm4";
164 &movd ($mul0,&DWP(0,$bp)); # bp[0]
168 &pmuludq($mul1,$mul0); # ap[0]*bp[0]
186 &pmuludq($acc0,$mul0); # ap[j]*bp[0]
204 &pmuludq($acc0,$mul0); # ap[num-1]*bp[0]
224 &movd ($mul0,&DWP(0,$bp,$i,4)); # bp[i]
228 &pmuludq($mul1,$mul0); # ap[0]*bp[i]
251 &pmuludq($acc0,$mul0); # ap[j]*bp[i]
272 &pmuludq($acc0,$mul0); # ap[num-1]*bp[i]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/Transforms/GVNSink/ |
| D | int_sideeffect.ll | 18 %mul0 = fmul float %sub, %d
27 %phi = phi float [ %mul0, %if.then ], [ %mul1, %if.else ]
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| /external/libaom/libaom/av1/encoder/x86/ |
| D | ml_sse3.c | 69 const __m128 mul0 = _mm_mul_ps(weight0, inputs128); in nn_propagate_4to4() local
72 hadd[i] = _mm_hadd_ps(mul0, mul1); in nn_propagate_4to4()
92 const __m128 mul0 = _mm_mul_ps(inputs128, weight0); in nn_propagate_4to8() local
94 hadd[i] = _mm_hadd_ps(mul0, mul1); in nn_propagate_4to8()
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| /external/tensorflow/tensorflow/compiler/xla/service/ |
| D | bfloat16_conversion_folding_test.cc | 129 HloInstruction* mul0 = builder.AddInstruction( in TEST_F() local
132 builder.AddInstruction(HloInstruction::CreateConvert(bf16_shape, mul0)); in TEST_F()
147 EXPECT_EQ(mul0->shape().element_type(), F32); in TEST_F()
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| D | bfloat16_normalization_test.cc | 132 HloInstruction* mul0 = builder.AddInstruction( in TEST_F() local
136 HloInstruction::CreateBinary(bf16_shape, HloOpcode::kMultiply, mul0, c)); in TEST_F()
145 EXPECT_EQ(mul0->shape().element_type(), F32); in TEST_F()
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| /external/llvm/test/CodeGen/SystemZ/ |
| D | fp-mul-01.ll | 106 %mul0 = fmul float %ret, %val0
107 %mul1 = fmul float %mul0, %val1
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| D | fp-mul-03.ll | 108 %mul0 = fmul double %ret, %val0
109 %mul1 = fmul double %mul0, %val1
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| D | fp-move-02.ll | 281 %mul0 = fmul double %conv0, %factor
282 store volatile double %mul0, double *@dptr
330 %double0 = phi double [ 1.0, %entry ], [ %mul0, %loop ]
342 %mul0 = fmul double %double0, %factor
359 %conv0 = bitcast double %mul0 to i64
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| D | int-mul-04.ll | 127 %mul0 = mul i64 %ret, %val0
128 %mul1 = mul i64 %mul0, %val1
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| D | int-mul-03.ll | 168 %mul0 = mul i64 %ret, %ext0
169 %mul1 = mul i64 %mul0, %ext1
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| D | int-mul-02.ll | 162 %mul0 = mul i32 %ret, %val0
163 %mul1 = mul i32 %mul0, %val1
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| D | fp-mul-02.ll | 144 %mul0 = fmul double %accext0, %ext0
145 %extra0 = fmul double %mul0, 1.01
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| D | fp-mul-04.ll | 164 %mul0 = fmul fp128 %accext0, %ext0
166 %extra0 = fmul fp128 %mul0, %const0
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/SystemZ/ |
| D | fp-mul-03.ll | 108 %mul0 = fmul double %ret, %val0
109 %mul1 = fmul double %mul0, %val1
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| D | fp-mul-01.ll | 108 %mul0 = fmul float %ret, %val0
109 %mul1 = fmul float %mul0, %val1
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| D | fp-move-02.ll | 281 %mul0 = fmul double %conv0, %factor
282 store volatile double %mul0, double *@dptr
330 %double0 = phi double [ 1.0, %entry ], [ %mul0, %loop ]
342 %mul0 = fmul double %double0, %factor
359 %conv0 = bitcast double %mul0 to i64
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| D | int-mul-04.ll | 127 %mul0 = mul i64 %ret, %val0
128 %mul1 = mul i64 %mul0, %val1
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| D | int-mul-02.ll | 162 %mul0 = mul i32 %ret, %val0
163 %mul1 = mul i32 %mul0, %val1
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| D | int-mul-03.ll | 168 %mul0 = mul i64 %ret, %ext0
169 %mul1 = mul i64 %mul0, %ext1
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| D | fp-mul-02.ll | 144 %mul0 = fmul double %accext0, %ext0
145 %extra0 = fmul double %mul0, 1.01
|