| /external/capstone/suite/MC/PowerPC/ |
| D | ppc64-encoding.s.cs | 96 0x7c,0x43,0x20,0x96 = mulhw 2, 3, 4
97 0x7c,0x43,0x20,0x97 = mulhw. 2, 3, 4
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/ |
| D | mulhs.ll | 6 ; RUN: grep mulhw %t | count 1
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/ |
| D | mulhs.ll | 6 ; RUN: grep mulhw %t | count 1
|
| /external/llvm/test/CodeGen/PowerPC/ |
| D | mulhs.ll | 6 ; RUN: grep mulhw %t | count 1
|
| /external/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding.s | 401 # CHECK-BE: mulhw 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x96]
402 # CHECK-LE: mulhw 2, 3, 4 # encoding: [0x96,0x20,0x43,0x7c]
403 mulhw 2, 3, 4
404 # CHECK-BE: mulhw. 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x97]
405 # CHECK-LE: mulhw. 2, 3, 4 # encoding: [0x97,0x20,0x43,0x7c]
406 mulhw. 2, 3, 4
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/PowerPC/ |
| D | ppc64-encoding.s | 442 # CHECK-BE: mulhw 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x96]
443 # CHECK-LE: mulhw 2, 3, 4 # encoding: [0x96,0x20,0x43,0x7c]
444 mulhw 2, 3, 4
445 # CHECK-BE: mulhw. 2, 3, 4 # encoding: [0x7c,0x43,0x20,0x97]
446 # CHECK-LE: mulhw. 2, 3, 4 # encoding: [0x97,0x20,0x43,0x7c]
447 mulhw. 2, 3, 4
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64le-encoding.txt | 310 # CHECK: mulhw 2, 3, 4
313 # CHECK: mulhw. 2, 3, 4
|
| D | ppc64-encoding.txt | 313 # CHECK: mulhw 2, 3, 4
316 # CHECK: mulhw. 2, 3, 4
|
| /external/llvm/test/MC/Disassembler/PowerPC/ |
| D | ppc64-encoding.txt | 313 # CHECK: mulhw 2, 3, 4
316 # CHECK: mulhw. 2, 3, 4
|
| D | ppc64le-encoding.txt | 310 # CHECK: mulhw 2, 3, 4
313 # CHECK: mulhw. 2, 3, 4
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCSchedule.td | 275 // mulhw IntMulHW
|
| D | PPCInstrInfo.td | 1178 "mulhw $rT, $rA, $rB", IntMulHW,
|
| /external/v8/src/compiler/ppc/ |
| D | code-generator-ppc.cc | 1460 __ mulhw(i.OutputRegister(1), in AssembleArchInstruction() local
1466 __ mulhw(i.OutputRegister(1), in AssembleArchInstruction() local
1471 __ mulhw(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1), in AssembleArchInstruction() local
|
| /external/v8/src/ppc/ |
| D | assembler-ppc.h | 1047 void mulhw(Register dst, Register src1, Register src2, RCBit r = LeaveRC);
|
| D | constants-ppc.h | 2020 V(mulhw, MULHWX, 0x7C000096) \
|
| D | assembler-ppc.cc | 891 void Assembler::mulhw(Register dst, Register src1, Register src2, RCBit r) { in mulhw() function in v8::internal::Assembler
|
| /external/u-boot/doc/ |
| D | README.POST | 452 subfc, subfe, subme, subze, mullw, mulhw, mulhwu, divw, divwu,
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.td | 2483 "mulhw", "$rT, $rA, $rB", IIC_IntMulHW,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrInfo.td | 2763 "mulhw", "$rT, $rA, $rB", IIC_IntMulHW,
|