| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AVR/ |
| D | inst-muls.s | 6 muls r22, r16
7 muls r19, r17
8 muls r28, r31
9 muls r31, r31
11 ; CHECK: muls r22, r16 ; encoding: [0x60,0x02]
12 ; CHECK: muls r19, r17 ; encoding: [0x31,0x02]
13 ; CHECK: muls r28, r31 ; encoding: [0xcf,0x02]
14 ; CHECK: muls r31, r31 ; encoding: [0xff,0x02]
|
| /external/llvm/test/CodeGen/ARM/ |
| D | shifter_operand.ll | 71 ; CHECK-THUMB: muls r1, r2, r1
82 ; CHECK-THUMB: muls r1, r2, r1
94 ; CHECK-THUMB: muls r1, r2, r1
106 ; CHECK-THUMB: muls r1, r2, r1
118 ; CHECK-THUMB: muls r1, r2, r1
130 ; CHECK-THUMB: muls r1, r2, r1
142 ; CHECK-THUMB: muls r1, r2, r1
156 ; CHECK-THUMB: muls r1, r2, r1
170 ; CHECK-THUMB: muls r1, r2, r1
184 ; CHECK-THUMB: muls r1, r2, r1
[all …]
|
| D | avoid-cpsr-rmw.ll | 10 ; CHECK-CORTEX: muls [[REG:(r[0-9]+)]], r3, r2
12 ; CHECK-SWIFT: muls [[REG2:(r[0-9]+)]], r1, r0
14 ; CHECK-NEXT: muls r0, [[REG]], [[REG2]]
31 ; CHECK-NOT: muls
64 ; CHECK: muls
|
| D | gep-optimization.ll | 12 ; CHECK-T1: muls [[REG2:r[0-9]+]], r1, [[REG1]]
36 ; CHECK-T1: muls [[REG2:r[0-9]+]], r1, [[REG1]]
60 ; CHECK-T1: muls [[REG2:r[0-9]+]], r1, [[REG1]]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | shifter_operand.ll | 71 ; CHECK-THUMB: muls r1, r2, r1
82 ; CHECK-THUMB: muls r1, r2, r1
94 ; CHECK-THUMB: muls r1, r2, r1
106 ; CHECK-THUMB: muls r1, r2, r1
118 ; CHECK-THUMB: muls r1, r2, r1
130 ; CHECK-THUMB: muls r1, r2, r1
142 ; CHECK-THUMB: muls r1, r2, r1
156 ; CHECK-THUMB: muls r1, r2, r1
170 ; CHECK-THUMB: muls r1, r2, r1
184 ; CHECK-THUMB: muls r1, r2, r1
[all …]
|
| D | avoid-cpsr-rmw.ll | 10 ; CHECK-CORTEX: muls [[REG:(r[0-9]+)]], r3, r2
12 ; CHECK-SWIFT: muls [[REG2:(r[0-9]+)]], r1, r0
14 ; CHECK-NEXT: muls r0, [[REG]], [[REG2]]
31 ; CHECK-NOT: muls
64 ; CHECK: muls
|
| D | memset-inline.ll | 44 ; CHECK-7A: muls [[REG:r[0-9]+]],
47 ; CHECK-6M-NOT: muls
70 ; CHECK-7A: muls [[REG:r[0-9]+]],
73 ; CHECK-6M: muls [[REG:r[0-9]+]],
|
| D | gep-optimization.ll | 12 ; CHECK-T1: muls [[REG2:r[0-9]+]], r1, [[REG1]]
36 ; CHECK-T1: muls [[REG2:r[0-9]+]], r1, [[REG1]]
60 ; CHECK-T1: muls [[REG2:r[0-9]+]], r1, [[REG1]]
|
| D | thumb1-div.ll | 29 ; CHECK-NEXT: muls
38 ; CHECK-NEXT: muls
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AVR/ |
| D | mul.ll | 5 ; CHECK: muls r22, r24
14 ; CHECK: muls r22, r25
21 ; CHECK: muls r23, r24
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/ARM/ |
| D | avoid-cpsr-rmw.ll | 9 ; CHECK: muls [[REG:(r[0-9]+)]], r2, r3
11 ; CHECK-NEXT: muls r0, [[REG2]], [[REG]]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-mla.ll | 13 ; NO_MULOPS: muls r0, r1, r0
24 ; NO_MULOPS: muls r0, r1, r0
|
| D | thumb2-mls.ll | 18 ; CHECK: muls r0, r1, r0
|
| D | thumb2-mul.ll | 5 ; CHECK: muls r0, r1, r0
|
| /external/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-mla.ll | 13 ; NO_MULOPS: muls r0, r1, r0
24 ; NO_MULOPS: muls r0, r1, r0
|
| D | thumb2-mls.ll | 18 ; CHECK: muls r0, r1, r0
|
| D | thumb2-mul.ll | 5 ; CHECK: muls r0, r1, r0
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-thumb-instructions.s.cs | 84 0x51,0x43 = muls r1, r2, r1
85 0x5a,0x43 = muls r2, r3, r2
86 0x63,0x43 = muls r3, r4, r3
|
| /external/llvm/test/MC/ARM/ |
| D | mul-v4.s | 6 @ ARMV4: muls r0, r1, r2 @ encoding: [0x91,0x02,0x10,0xe0]
10 muls r0, r1, r2 label
|
| D | basic-thumb-instructions.s | 423 muls r1, r2, r1
424 muls r2, r2, r3
425 muls r3, r4
427 @ CHECK: muls r1, r2, r1 @ encoding: [0x51,0x43]
428 @ CHECK: muls r2, r3, r2 @ encoding: [0x5a,0x43]
429 @ CHECK: muls r3, r4, r3 @ encoding: [0x63,0x43]
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | mul-v4.s | 6 @ ARMV4: muls r0, r1, r2 @ encoding: [0x91,0x02,0x10,0xe0]
10 muls r0, r1, r2 label
|
| D | basic-thumb-instructions.s | 423 muls r1, r2, r1
424 muls r2, r2, r3
425 muls r3, r4
427 @ CHECK: muls r1, r2, r1 @ encoding: [0x51,0x43]
428 @ CHECK: muls r2, r3, r2 @ encoding: [0x5a,0x43]
429 @ CHECK: muls r3, r4, r3 @ encoding: [0x63,0x43]
|
| /external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/ |
| D | thumb2-mls.ll | 18 ; CHECK: muls r0, r0, r1
|
| D | thumb2-mul.ll | 5 ; CHECK: muls r0, r0, r1
|
| /external/swiftshader/third_party/LLVM/test/MC/ARM/ |
| D | basic-thumb-instructions.s | 374 muls r1, r2, r1
375 muls r3, r4
377 @ CHECK: muls r1, r2, r1 @ encoding: [0x51,0x43]
378 @ CHECK: muls r3, r4, r3 @ encoding: [0x63,0x43]
|