| /external/swiftshader/third_party/LLVM/test/CodeGen/Mips/ |
| D | 2008-08-01-AsmInline.ll | 4 ; RUN: grep multu %t | count 1
12 …%asmtmp = tail call %struct.DWstruct asm "multu $2,$3", "={lo},={hi},d,d"( i32 %u, i32 %v ) nounwi…
|
| /external/capstone/suite/MC/Mips/ |
| D | mips-dsp-instructions.s.cs | 25 0x00,0x85,0x10,0x19 = multu $ac2, $4, $5
35 0x00,0x85,0x00,0x19 = multu $4, $5
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| D | micromips-alu-instructions.s.cs | 31 0xe9,0x00,0x3c,0x9b = multu $9, $7
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| D | micromips-alu-instructions-EB.s.cs | 31 0x00,0xe9,0x9b,0x3c = multu $9, $7
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| D | mips64-alu-instructions.s.cs | 45 0x19,0x00,0x65,0x00 = multu $3, $5
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| D | mips-alu-instructions.s.cs | 46 0x19,0x00,0x65,0x00 = multu $3, $5
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/ |
| D | mul-macro-variants.s | 95 # CHECK: multu $4, $5 # encoding: [0x00,0x85,0x00,0x19]
101 # CHECK-TRAP: multu $4, $5 # encoding: [0x00,0x85,0x00,0x19]
106 # CHECK: multu $5, $6 # encoding: [0x00,0xa6,0x00,0x19]
112 # CHECK-TRAP: multu $5, $6 # encoding: [0x00,0xa6,0x00,0x19]
|
| D | micromips-alu-instructions.s | 38 # CHECK-EL: multu $9, $7 # encoding: [0xe9,0x00,0x3c,0x9b]
81 # CHECK-EB: multu $9, $7 # encoding: [0x00,0xe9,0x9b,0x3c]
122 multu $9, $7
|
| D | mips-alu-instructions.s | 87 # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
112 multu $3,$5
|
| D | mips64-alu-instructions.s | 83 # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
108 multu $3,$5
|
| /external/llvm/test/MC/Mips/ |
| D | micromips-alu-instructions.s | 38 # CHECK-EL: multu $9, $7 # encoding: [0xe9,0x00,0x3c,0x9b]
81 # CHECK-EB: multu $9, $7 # encoding: [0x00,0xe9,0x9b,0x3c]
122 multu $9, $7
|
| D | mips64-alu-instructions.s | 83 # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
108 multu $3,$5
|
| D | mips-alu-instructions.s | 87 # CHECK: multu $3, $5 # encoding: [0x19,0x00,0x65,0x00]
112 multu $3,$5
|
| /external/llvm/test/CodeGen/Mips/ |
| D | 2008-08-01-AsmInline.ll | 8 ; CHECK: multu
11 …%asmtmp = tail call %struct.DWstruct asm "multu $2,$3", "={lo},={hi},d,d"( i32 %u, i32 %v ) nounwi…
|
| D | mulll.ll | 13 ; 16: multu ${{[0-9]+}}, ${{[0-9]+}}
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/ |
| D | 2008-08-01-AsmInline.ll | 8 ; CHECK: multu
11 …%asmtmp = tail call %struct.DWstruct asm "multu $2,$3", "={lo},={hi},d,d"( i32 %u, i32 %v ) nounwi…
|
| D | mulll.ll | 13 ; 16: multu ${{[0-9]+}}, ${{[0-9]+}}
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips32r6/ |
| D | invalid-mips1.s | 23 …multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
24 …multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| D | invalid-mips1.s | 23 …multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
24 …multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm/test/MC/Mips/dsp/ |
| D | valid.s | 78 …multu $ac2, $4, $5 # CHECK: multu $ac2, $4, $5 # encoding: [0x00,0x…
80 …multu $4, $5 # CHECK: multu $4, $5 # encoding: [0x00,0x…
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/dsp/ |
| D | valid.s | 78 …multu $ac2, $4, $5 # CHECK: multu $ac2, $4, $5 # encoding: [0x00,0x…
80 …multu $4, $5 # CHECK: multu $4, $5 # encoding: [0x00,0x…
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/mips64r6/ |
| D | invalid-mips3.s | 22 …multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
23 …multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| D | invalid-mips1.s | 26 …multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
27 …multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| D | invalid-mips3.s | 22 …multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
23 …multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|
| D | invalid-mips1.s | 26 …multu $9,$s2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
27 …multu $gp,$k0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU fe…
|