| /external/u-boot/drivers/ddr/marvell/a38x/ |
| D | ddr3_init.c | 40 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_init()
125 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_get_memory_size_per_cs_in_bits()
164 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_if_ecc_enabled()
185 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_training_params_set()
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| D | ddr3_debug.c | 34 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_user_log_level_set()
114 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_reg_dump()
316 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in print_device_info()
361 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_print_log()
532 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_print_stability_log()
693 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_read_adll_value()
727 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_write_adll_value()
762 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in read_phase_value()
790 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in write_leveling_value()
853 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_print_adll()
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| D | mv_ddr_topology.c | 43 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_topology_map_update()
143 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_bus_bit_mask_get()
173 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_if_bus_width_get()
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| D | ddr3_training.c | 262 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_configure_cs()
322 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in calc_cs_num()
366 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in hws_ddr3_tip_init_controller()
699 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_rev2_rank_control()
753 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_rev3_rank_control()
797 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_pad_inv()
905 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_pre_algo_config()
938 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_post_algo_config()
1082 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_if_polling()
1156 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_bus_read_modify_write()
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| D | ddr3_training_ip_engine.c | 356 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_ip_training()
575 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_load_pattern_to_odpg()
708 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_read_training_result()
848 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_load_all_pattern_to_mem()
876 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_load_pattern_to_mem()
974 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_ip_training_wrapper_int()
1125 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_ip_training_wrapper()
1460 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_load_phy_values()
1530 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_training_ip_test()
1604 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_get_pattern_table()
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| D | ddr3_training_leveling.c | 31 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_max_cs_get()
75 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_dynamic_read_leveling()
344 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_legacy_dynamic_write_leveling()
385 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_legacy_dynamic_read_leveling()
439 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_dynamic_per_bit_read_leveling()
796 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_calc_cs_mask()
847 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_dynamic_write_leveling()
1206 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_dynamic_write_leveling_supp()
1401 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_xsb_compare_test()
1492 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_dynamic_write_leveling_seq()
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| D | mv_ddr_plat.c | 615 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in prfa_read()
684 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_training_mask_set()
880 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_early_init()
923 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_silicon_post_init()
1034 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_fast_path_dynamic_cs_size_config()
1151 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_save_and_set_training_windows()
1376 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_configure_phy()
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| D | ddr3_training_bist.c | 78 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_bist_read_result()
124 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in hws_ddr3_run_bist()
187 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_print_bist_res()
225 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_tip_bist()
487 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in mv_ddr_dm_vw_get()
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| D | ddr3_training_centralization.c | 64 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_centralization()
509 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_special_rx()
699 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_print_centralization_result()
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| D | ddr3_training_hw_algo.c | 167 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_vref()
631 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_cmd_addr_init_delay()
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| D | ddr3_training_pbs.c | 52 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_pbs()
944 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_print_pbs_result()
994 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in ddr3_tip_clean_pbs_result()
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| D | ddr3_init.h | 161 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void);
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| D | ddr3_training_db.c | 612 struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get(); in pattern_table_get_word()
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| /external/u-boot/board/Marvell/db-88f6820-amc/ |
| D | db-88f6820-amc.c | 80 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get() function
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| /external/u-boot/board/solidrun/clearfog/ |
| D | clearfog.c | 78 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get() function
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| /external/u-boot/board/kobol/helios4/ |
| D | helios4.c | 91 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get() function
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| /external/u-boot/board/Marvell/db-88f6820-gp/ |
| D | db-88f6820-gp.c | 101 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get() function
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| /external/u-boot/board/gdsys/a38x/ |
| D | controlcenterdc.c | 128 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get() function
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| /external/u-boot/board/CZ.NIC/turris_omnia/ |
| D | turris_omnia.c | 247 struct mv_ddr_topology_map *mv_ddr_topology_map_get(void) in mv_ddr_topology_map_get() function
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