/external/capstone/suite/MC/AArch64/ |
D | neon-mov.s.cs | 15 0x20,0x04,0x00,0x2f = mvni v0.2s, #0x1 16 0x01,0x04,0x00,0x2f = mvni v1.2s, #0x0 17 0x20,0x24,0x00,0x2f = mvni v0.2s, #0x1, lsl #8 18 0x20,0x44,0x00,0x2f = mvni v0.2s, #0x1, lsl #16 19 0x20,0x64,0x00,0x2f = mvni v0.2s, #0x1, lsl #24 20 0x20,0x04,0x00,0x6f = mvni v0.4s, #0x1 21 0x2f,0x24,0x00,0x6f = mvni v15.4s, #0x1, lsl #8 22 0x30,0x44,0x00,0x6f = mvni v16.4s, #0x1, lsl #16 23 0x3f,0x64,0x00,0x6f = mvni v31.4s, #0x1, lsl #24 24 0x20,0x84,0x00,0x2f = mvni v0.4h, #0x1 [all …]
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/external/llvm/test/MC/AArch64/ |
D | neon-mov.s | 40 mvni v0.2s, #1 41 mvni v1.2s, #0 42 mvni v0.2s, #1, lsl #8 43 mvni v0.2s, #1, lsl #16 44 mvni v0.2s, #1, lsl #24 45 mvni v0.4s, #1 46 mvni v15.4s, #1, lsl #8 47 mvni v16.4s, #1, lsl #16 48 mvni v31.4s, #1, lsl #24 49 mvni v0.4h, #1 [all …]
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D | arm64-advsimd.s | 1080 mvni.2s v0, #1 1081 mvni.2s v0, #1, lsl #0 1082 mvni.2s v0, #1, lsl #8 1083 mvni.2s v0, #1, lsl #16 1084 mvni.2s v0, #1, lsl #24 1086 ; CHECK: mvni.2s v0, #1 ; encoding: [0x20,0x04,0x00,0x2f] 1087 ; CHECK: mvni.2s v0, #1 ; encoding: [0x20,0x04,0x00,0x2f] 1088 ; CHECK: mvni.2s v0, #1, lsl #8 ; encoding: [0x20,0x24,0x00,0x2f] 1089 ; CHECK: mvni.2s v0, #1, lsl #16 ; encoding: [0x20,0x44,0x00,0x2f] 1090 ; CHECK: mvni.2s v0, #1, lsl #24 ; encoding: [0x20,0x64,0x00,0x2f] [all …]
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D | neon-diagnostics.s | 147 mvni v1.4s, #256 179 mvni v7.4s, #256, msl #16 182 mvni v17.4s, #255, msl #32
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | neon-mov.s | 40 mvni v0.2s, #1 41 mvni v1.2s, #0 42 mvni v0.2s, #1, lsl #8 43 mvni v0.2s, #1, lsl #16 44 mvni v0.2s, #1, lsl #24 45 mvni v0.4s, #1 46 mvni v15.4s, #1, lsl #8 47 mvni v16.4s, #1, lsl #16 48 mvni v31.4s, #1, lsl #24 49 mvni v0.4h, #1 [all …]
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D | arm64-advsimd.s | 1080 mvni.2s v0, #1 1081 mvni.2s v0, #1, lsl #0 1082 mvni.2s v0, #1, lsl #8 1083 mvni.2s v0, #1, lsl #16 1084 mvni.2s v0, #1, lsl #24 1086 ; CHECK: mvni.2s v0, #1 ; encoding: [0x20,0x04,0x00,0x2f] 1087 ; CHECK: mvni.2s v0, #1 ; encoding: [0x20,0x04,0x00,0x2f] 1088 ; CHECK: mvni.2s v0, #1, lsl #8 ; encoding: [0x20,0x24,0x00,0x2f] 1089 ; CHECK: mvni.2s v0, #1, lsl #16 ; encoding: [0x20,0x44,0x00,0x2f] 1090 ; CHECK: mvni.2s v0, #1, lsl #24 ; encoding: [0x20,0x64,0x00,0x2f] [all …]
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D | neon-diagnostics.s | 147 mvni v1.4s, #256 179 mvni v7.4s, #256, msl #16 182 mvni v17.4s, #255, msl #32
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/ |
D | neon-mov.ll | 92 ; CHECK: mvni {{v[0-9]+}}.2s, #{{0x10|16}} 98 ; CHECK: mvni {{v[0-9]+}}.2s, #{{0x10|16}}, lsl #8 104 ; CHECK: mvni {{v[0-9]+}}.2s, #{{0x10|16}}, lsl #16 110 ; CHECK: mvni {{v[0-9]+}}.2s, #{{0x10|16}}, lsl #24 116 ; CHECK: mvni {{v[0-9]+}}.4s, #{{0x10|16}} 122 ; CHECK: mvni {{v[0-9]+}}.4s, #{{0x10|16}}, lsl #8 128 ; CHECK: mvni {{v[0-9]+}}.4s, #{{0x10|16}}, lsl #16 135 ; CHECK: mvni {{v[0-9]+}}.4s, #{{0x10|16}}, lsl #24 142 ; CHECK: mvni {{v[0-9]+}}.4h, #{{0x10|16}} 148 ; CHECK: mvni {{v[0-9]+}}.4h, #{{0x10|16}}, lsl #8 [all …]
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D | aarch64-be-bv.ll | 152 ; CHECK-NEXT: mvni v[[REG2:[0-9]+]].4s, #1 164 ; CHECK-NEXT: mvni v[[REG2:[0-9]+]].4s, #1, lsl #8 176 ; CHECK-NEXT: mvni v[[REG2:[0-9]+]].4s, #1, lsl #16 188 ; CHECK-NEXT: mvni v[[REG2:[0-9]+]].4s, #1, lsl #24 200 ; CHECK-NEXT: mvni v[[REG2:[0-9]+]].8h, #1 212 ; CHECK-NEXT: mvni v[[REG2:[0-9]+]].8h, #1, lsl #8 224 ; CHECK-NEXT: mvni v[[REG2:[0-9]+]].4s, #1, msl #8 236 ; CHECK-NEXT: mvni v[[REG2:[0-9]+]].4s, #1, msl #16
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D | build-one-lane.ll | 203 ; CHECK: mvni v[[R:[0-9]+]].8h, #85, lsl #8
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D | arm64-neon-2velem-high.ll | 95 ; CHECK-NEXT: mvni [[REPLICATE:v[0-9]+]].4s, #1, msl #8 121 ; CHECK-NEXT: mvni [[REPLICATE:v[0-9]+]].8h, #17, lsl #8
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/external/llvm/test/CodeGen/AArch64/ |
D | neon-mov.ll | 92 ; CHECK: mvni {{v[0-9]+}}.2s, #{{0x10|16}} 98 ; CHECK: mvni {{v[0-9]+}}.2s, #{{0x10|16}}, lsl #8 104 ; CHECK: mvni {{v[0-9]+}}.2s, #{{0x10|16}}, lsl #16 110 ; CHECK: mvni {{v[0-9]+}}.2s, #{{0x10|16}}, lsl #24 116 ; CHECK: mvni {{v[0-9]+}}.4s, #{{0x10|16}} 122 ; CHECK: mvni {{v[0-9]+}}.4s, #{{0x10|16}}, lsl #8 128 ; CHECK: mvni {{v[0-9]+}}.4s, #{{0x10|16}}, lsl #16 135 ; CHECK: mvni {{v[0-9]+}}.4s, #{{0x10|16}}, lsl #24 142 ; CHECK: mvni {{v[0-9]+}}.4h, #{{0x10|16}} 148 ; CHECK: mvni {{v[0-9]+}}.4h, #{{0x10|16}}, lsl #8 [all …]
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D | aarch64-be-bv.ll | 152 ; CHECK-NEXT: mvni v[[REG2:[0-9]+]].4s, #1 164 ; CHECK-NEXT: mvni v[[REG2:[0-9]+]].4s, #1, lsl #8 176 ; CHECK-NEXT: mvni v[[REG2:[0-9]+]].4s, #1, lsl #16 188 ; CHECK-NEXT: mvni v[[REG2:[0-9]+]].4s, #1, lsl #24 200 ; CHECK-NEXT: mvni v[[REG2:[0-9]+]].8h, #1 212 ; CHECK-NEXT: mvni v[[REG2:[0-9]+]].8h, #1, lsl #8 224 ; CHECK-NEXT: mvni v[[REG2:[0-9]+]].4s, #1, msl #8 236 ; CHECK-NEXT: mvni v[[REG2:[0-9]+]].4s, #1, msl #16
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D | arm64-neon-2velem-high.ll | 95 ; CHECK-NEXT: mvni [[REPLICATE:v[0-9]+]].4s, #1, msl #8 121 ; CHECK-NEXT: mvni [[REPLICATE:v[0-9]+]].8h, #17, lsl #8
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-advsimd.txt | 1524 # CHECK: mvni.2s v0, #0x1 1525 # CHECK: mvni.2s v0, #0x1, lsl #8 1526 # CHECK: mvni.2s v0, #0x1, lsl #16 1527 # CHECK: mvni.2s v0, #0x1, lsl #24 1534 # CHECK: mvni.4s v0, #0x1 1535 # CHECK: mvni.4s v0, #0x1, lsl #8 1536 # CHECK: mvni.4s v0, #0x1, lsl #16 1537 # CHECK: mvni.4s v0, #0x1, lsl #24 1542 # CHECK: mvni.4h v0, #0x1 1543 # CHECK: mvni.4h v0, #0x1, lsl #8 [all …]
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-advsimd.txt | 1524 # CHECK: mvni.2s v0, #0x1 1525 # CHECK: mvni.2s v0, #0x1, lsl #8 1526 # CHECK: mvni.2s v0, #0x1, lsl #16 1527 # CHECK: mvni.2s v0, #0x1, lsl #24 1534 # CHECK: mvni.4s v0, #0x1 1535 # CHECK: mvni.4s v0, #0x1, lsl #8 1536 # CHECK: mvni.4s v0, #0x1, lsl #16 1537 # CHECK: mvni.4s v0, #0x1, lsl #24 1542 # CHECK: mvni.4h v0, #0x1 1543 # CHECK: mvni.4h v0, #0x1, lsl #8 [all …]
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/external/vixl/src/aarch64/ |
D | macro-assembler-aarch64.cc | 958 mvni(vd, ~byte2 & 0xff, LSL, 8); in Movi16bitHelper() 960 mvni(vd, ~byte1 & 0xff); in Movi16bitHelper() 1004 mvni(vd, ~bytes[i] & 0xff, LSL, i * 8); in Movi32bitHelper() 1023 mvni(vd, ~bytes[2] & 0xff, MSL, 16); in Movi32bitHelper() 1028 mvni(vd, ~bytes[1] & 0xff, MSL, 8); in Movi32bitHelper()
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/external/v8/src/arm64/ |
D | macro-assembler-arm64.cc | 374 mvni(vd, ~byte2 & 0xFF, LSL, 8); in Movi16bitHelper() 376 mvni(vd, ~byte1 & 0xFF); in Movi16bitHelper() 419 mvni(vd, ~bytes[i] & 0xFF, LSL, i * 8); in Movi32bitHelper() 438 mvni(vd, ~bytes[2] & 0xFF, MSL, 16); in Movi32bitHelper() 443 mvni(vd, ~bytes[1] & 0xFF, MSL, 8); in Movi32bitHelper()
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/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 1058 0x~~~~~~~~~~~~~~~~ 2f052719 mvni v25.2s, #0xb8, lsl #8 1059 0x~~~~~~~~~~~~~~~~ 2f03d591 mvni v17.2s, #0x6c, msl #16 1060 0x~~~~~~~~~~~~~~~~ 2f02851d mvni v29.4h, #0x48, lsl #0 1061 0x~~~~~~~~~~~~~~~~ 6f034754 mvni v20.4s, #0x7a, lsl #16 1062 0x~~~~~~~~~~~~~~~~ 6f00c7c0 mvni v0.4s, #0x1e, msl #8 1063 0x~~~~~~~~~~~~~~~~ 6f0187df mvni v31.8h, #0x3e, lsl #0
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D | log-disasm | 1058 0x~~~~~~~~~~~~~~~~ 2f052719 mvni v25.2s, #0xb8, lsl #8 1059 0x~~~~~~~~~~~~~~~~ 2f03d591 mvni v17.2s, #0x6c, msl #16 1060 0x~~~~~~~~~~~~~~~~ 2f02851d mvni v29.4h, #0x48, lsl #0 1061 0x~~~~~~~~~~~~~~~~ 6f034754 mvni v20.4s, #0x7a, lsl #16 1062 0x~~~~~~~~~~~~~~~~ 6f00c7c0 mvni v0.4s, #0x1e, msl #8 1063 0x~~~~~~~~~~~~~~~~ 6f0187df mvni v31.8h, #0x3e, lsl #0
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D | log-cpufeatures-custom | 1057 0x~~~~~~~~~~~~~~~~ 2f052719 mvni v25.2s, #0xb8, lsl #8 ### {NEON} ### 1058 0x~~~~~~~~~~~~~~~~ 2f03d591 mvni v17.2s, #0x6c, msl #16 ### {NEON} ### 1059 0x~~~~~~~~~~~~~~~~ 2f02851d mvni v29.4h, #0x48, lsl #0 ### {NEON} ### 1060 0x~~~~~~~~~~~~~~~~ 6f034754 mvni v20.4s, #0x7a, lsl #16 ### {NEON} ### 1061 0x~~~~~~~~~~~~~~~~ 6f00c7c0 mvni v0.4s, #0x1e, msl #8 ### {NEON} ### 1062 0x~~~~~~~~~~~~~~~~ 6f0187df mvni v31.8h, #0x3e, lsl #0 ### {NEON} ###
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D | log-cpufeatures | 1057 0x~~~~~~~~~~~~~~~~ 2f052719 mvni v25.2s, #0xb8, lsl #8 // Needs: NEON 1058 0x~~~~~~~~~~~~~~~~ 2f03d591 mvni v17.2s, #0x6c, msl #16 // Needs: NEON 1059 0x~~~~~~~~~~~~~~~~ 2f02851d mvni v29.4h, #0x48, lsl #0 // Needs: NEON 1060 0x~~~~~~~~~~~~~~~~ 6f034754 mvni v20.4s, #0x7a, lsl #16 // Needs: NEON 1061 0x~~~~~~~~~~~~~~~~ 6f00c7c0 mvni v0.4s, #0x1e, msl #8 // Needs: NEON 1062 0x~~~~~~~~~~~~~~~~ 6f0187df mvni v31.8h, #0x3e, lsl #0 // Needs: NEON
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 1291 __ mvni(v25.V2S(), 0xb8, LSL, 8); in GenerateTestSequenceNEON() local 1292 __ mvni(v17.V2S(), 0x6c, MSL, 16); in GenerateTestSequenceNEON() local 1293 __ mvni(v29.V4H(), 0x48, LSL); in GenerateTestSequenceNEON() local 1294 __ mvni(v20.V4S(), 0x7a, LSL, 16); in GenerateTestSequenceNEON() local 1295 __ mvni(v0.V4S(), 0x1e, MSL, 8); in GenerateTestSequenceNEON() local 1296 __ mvni(v31.V8H(), 0x3e, LSL); in GenerateTestSequenceNEON() local
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 4485 defm MVNI : SIMDModifiedImmVectorShift<1, 0b10, 0b00, "mvni">; 4487 def : InstAlias<"mvni $Vd.4h, $imm", (MVNIv4i16 V64:$Vd, imm0_255:$imm, 0), 0>; 4488 def : InstAlias<"mvni $Vd.8h, $imm", (MVNIv8i16 V128:$Vd, imm0_255:$imm, 0), 0>; 4489 def : InstAlias<"mvni $Vd.2s, $imm", (MVNIv2i32 V64:$Vd, imm0_255:$imm, 0), 0>; 4490 def : InstAlias<"mvni $Vd.4s, $imm", (MVNIv4i32 V128:$Vd, imm0_255:$imm, 0), 0>; 4492 def : InstAlias<"mvni.4h $Vd, $imm", (MVNIv4i16 V64:$Vd, imm0_255:$imm, 0), 0>; 4493 def : InstAlias<"mvni.8h $Vd, $imm", (MVNIv8i16 V128:$Vd, imm0_255:$imm, 0), 0>; 4494 def : InstAlias<"mvni.2s $Vd, $imm", (MVNIv2i32 V64:$Vd, imm0_255:$imm, 0), 0>; 4495 def : InstAlias<"mvni.4s $Vd, $imm", (MVNIv4i32 V128:$Vd, imm0_255:$imm, 0), 0>; 4507 def MVNIv2s_msl : SIMDModifiedImmMoveMSL<0, 1, {1,1,0,?}, V64, "mvni", ".2s", [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 4818 defm MVNI : SIMDModifiedImmVectorShift<1, 0b10, 0b00, "mvni">; 4820 def : InstAlias<"mvni $Vd.4h, $imm", (MVNIv4i16 V64:$Vd, imm0_255:$imm, 0), 0>; 4821 def : InstAlias<"mvni $Vd.8h, $imm", (MVNIv8i16 V128:$Vd, imm0_255:$imm, 0), 0>; 4822 def : InstAlias<"mvni $Vd.2s, $imm", (MVNIv2i32 V64:$Vd, imm0_255:$imm, 0), 0>; 4823 def : InstAlias<"mvni $Vd.4s, $imm", (MVNIv4i32 V128:$Vd, imm0_255:$imm, 0), 0>; 4825 def : InstAlias<"mvni.4h $Vd, $imm", (MVNIv4i16 V64:$Vd, imm0_255:$imm, 0), 0>; 4826 def : InstAlias<"mvni.8h $Vd, $imm", (MVNIv8i16 V128:$Vd, imm0_255:$imm, 0), 0>; 4827 def : InstAlias<"mvni.2s $Vd, $imm", (MVNIv2i32 V64:$Vd, imm0_255:$imm, 0), 0>; 4828 def : InstAlias<"mvni.4s $Vd, $imm", (MVNIv4i32 V128:$Vd, imm0_255:$imm, 0), 0>; 4841 def MVNIv2s_msl : SIMDModifiedImmMoveMSL<0, 1, {1,1,0,?}, V64, "mvni", ".2s", [all …]
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