/external/mesa3d/src/gallium/winsys/radeon/drm/ |
D | radeon_drm_surface.c | 72 level_drm->nblk_x = level_ws->nblk_x; in surf_level_winsys_to_drm() 74 level_drm->pitch_bytes = level_ws->nblk_x * bpe; in surf_level_winsys_to_drm() 84 level_ws->nblk_x = level_drm->nblk_x; in surf_level_drm_to_winsys() 87 assert(level_drm->nblk_x * bpe == level_drm->pitch_bytes); in surf_level_drm_to_winsys()
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/external/libdrm/radeon/ |
D | radeon_surface.c | 176 surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w; in surf_minify() 181 if (surflevel->nblk_x < xalign || surflevel->nblk_y < yalign) { in surf_minify() 186 surflevel->nblk_x = ALIGN(surflevel->nblk_x, xalign); in surf_minify() 191 surflevel->pitch_bytes = surflevel->nblk_x * bpe * surf->nsamples; in surf_minify() 585 surflevel->nblk_x = (surflevel->npix_x + surf->blk_w - 1) / surf->blk_w; in eg_surf_minify() 590 if (surflevel->nblk_x < mtilew || surflevel->nblk_y < mtileh) { in eg_surf_minify() 595 surflevel->nblk_x = ALIGN(surflevel->nblk_x, mtilew); in eg_surf_minify() 600 mtile_pr = surflevel->nblk_x / mtilew; in eg_surf_minify() 605 surflevel->pitch_bytes = surflevel->nblk_x * bpe * surf->nsamples; in eg_surf_minify() 1436 surflevel->nblk_x = (next_power_of_two(surflevel->npix_x) + surf->blk_w - 1) / surf->blk_w; in si_surf_minify() [all …]
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D | radeon_surface.h | 75 uint32_t nblk_x; member
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/external/mesa3d/src/gallium/drivers/radeon/ |
D | radeon_vce_40_2_2.c | 91 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encRefPicLumaPitch in create() 92 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encRefPicChromaPitch in create() 321 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch in encode() 322 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch in encode()
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D | radeon_vce_50.c | 128 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch in encode() 129 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch in encode()
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D | r600_texture.c | 202 *stride = rtex->surface.u.legacy.level[level].nblk_x * in r600_texture_get_offset() 215 rtex->surface.u.legacy.level[level].nblk_x + in r600_texture_get_offset() 312 surface->u.legacy.level[0].nblk_x = pitch; in r600_init_surface() 345 metadata->u.legacy.stride = surface->u.legacy.level[0].nblk_x * surface->bpe; in r600_texture_init_metadata() 754 stride = rtex->surface.u.legacy.level[0].nblk_x * in r600_texture_get_handle() 876 out->slice_tile_max = (fmask.u.legacy.level[0].nblk_x * fmask.u.legacy.level[0].nblk_y) / 64; in si_texture_get_fmask_info() 881 out->pitch_in_pixels = fmask.u.legacy.level[0].nblk_x; in si_texture_get_fmask_info() 1166 rtex->surface.u.legacy.level[i].nblk_x, in si_print_texture_info() 1184 rtex->surface.u.legacy.stencil_level[i].nblk_x, in si_print_texture_info()
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D | radeon_vce_52.c | 183 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encRefPicLumaPitch in create() 184 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encRefPicChromaPitch in create() 259 RVCE_CS(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe); // encInputPicLumaPitch in encode() 260 RVCE_CS(enc->chroma->u.legacy.level[0].nblk_x * enc->chroma->bpe); // encInputPicChromaPitch in encode()
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D | radeon_vce.c | 226 pitch = align(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe, 128); in si_vce_frame_offset() 463 align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) * in si_vce_create_encoder()
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D | radeon_vcn_enc.c | 279 align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) * in radeon_create_encoder()
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D | radeon_uvd.c | 1577 msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x * luma->blk_w; in si_uvd_set_dt_surfaces()
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/external/mesa3d/src/gallium/drivers/radeonsi/ |
D | si_dma.c | 168 slice_tile_max = (rtiled->surface.u.legacy.level[tiled_lvl].nblk_x * in si_dma_copy_tile() 271 dst_pitch = rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.bpe; in si_dma_copy() 272 src_pitch = rsrc->surface.u.legacy.level[src_level].nblk_x * rsrc->surface.bpe; in si_dma_copy()
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D | cik_sdma.c | 166 unsigned dst_pitch = rdst->surface.u.legacy.level[dst_level].nblk_x; in cik_sdma_copy_texture() 167 unsigned src_pitch = rsrc->surface.u.legacy.level[src_level].nblk_x; in cik_sdma_copy_texture()
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D | si_state.c | 2579 assert(levelinfo->nblk_x % 8 == 0 && levelinfo->nblk_y % 8 == 0); in si_init_depth_surface() 2616 surf->db_depth_size = S_028058_PITCH_TILE_MAX((levelinfo->nblk_x / 8) - 1) | in si_init_depth_surface() 2618 surf->db_depth_slice = S_02805C_SLICE_TILE_MAX((levelinfo->nblk_x * in si_init_depth_surface() 3082 pitch_tile_max = level_info->nblk_x / 8 - 1; in si_emit_framebuffer_state() 3083 slice_tile_max = level_info->nblk_x * in si_emit_framebuffer_state()
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D | si_descriptors.c | 401 unsigned pitch = base_level_info->nblk_x * block_width; in si_set_mutable_tex_desc_fields()
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/external/mesa3d/src/amd/common/ |
D | ac_surface.c | 289 AddrSurfInfoIn->basePitch = surf->u.legacy.stencil_level[0].nblk_x; in gfx6_compute_level() 291 AddrSurfInfoIn->basePitch = surf->u.legacy.level[0].nblk_x; in gfx6_compute_level() 308 surf_level->nblk_x = AddrSurfInfoOut->pitch; in gfx6_compute_level() 754 if (surf->u.legacy.stencil_level[level].nblk_x != in gfx6_compute_surface() 755 surf->u.legacy.level[level].nblk_x) in gfx6_compute_surface() 758 surf->u.legacy.level[level].nblk_x = in gfx6_compute_surface() 759 surf->u.legacy.stencil_level[level].nblk_x; in gfx6_compute_surface()
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D | ac_surface.h | 77 unsigned nblk_x:15; member
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/external/mesa3d/src/gallium/drivers/r600/ |
D | r600_texture.c | 179 *stride = rtex->surface.u.legacy.level[level].nblk_x * in r600_texture_get_offset() 192 rtex->surface.u.legacy.level[level].nblk_x + in r600_texture_get_offset() 255 pitch_in_bytes_override != surface->u.legacy.level[0].nblk_x * bpe) { in r600_init_surface() 259 surface->u.legacy.level[0].nblk_x = pitch_in_bytes_override / bpe; in r600_init_surface() 290 metadata->u.legacy.stride = surface->u.legacy.level[0].nblk_x * surface->bpe; in r600_texture_init_metadata() 504 stride = rtex->surface.u.legacy.level[0].nblk_x * in r600_texture_get_handle() 627 out->slice_tile_max = (fmask.u.legacy.level[0].nblk_x * fmask.u.legacy.level[0].nblk_y) / 64; in r600_texture_get_fmask_info() 632 out->pitch_in_pixels = fmask.u.legacy.level[0].nblk_x; in r600_texture_get_fmask_info() 855 rtex->surface.u.legacy.level[i].nblk_x, in r600_print_texture_info() 873 rtex->surface.u.legacy.stencil_level[i].nblk_x, in r600_print_texture_info()
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D | radeon_vce.c | 230 pitch = align(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe, 128); in rvce_frame_offset() 453 cpb_size = align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) * in rvce_create_encoder()
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D | r600_state.c | 727 …pitch = tmp->surface.u.legacy.level[offset_level].nblk_x * util_format_get_blockwidth(state->forma… in r600_create_sampler_view_custom() 832 pitch = rtex->surface.u.legacy.level[level].nblk_x / 8 - 1; in r600_init_color_surface() 833 …slice = (rtex->surface.u.legacy.level[level].nblk_x * rtex->surface.u.legacy.level[level].nblk_y) … in r600_init_color_surface() 1046 pitch = rtex->surface.u.legacy.level[level].nblk_x / 8 - 1; in r600_init_depth_surface() 1047 …slice = (rtex->surface.u.legacy.level[level].nblk_x * rtex->surface.u.legacy.level[level].nblk_y) … in r600_init_depth_surface() 2870 …slice_tile_max = (rsrc->surface.u.legacy.level[src_level].nblk_x * rsrc->surface.u.legacy.level[sr… in r600_dma_copy_tile() 2889 …slice_tile_max = (rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.u.legacy.level[ds… in r600_dma_copy_tile() 2981 dst_pitch = rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.bpe; in r600_dma_copy() 2982 src_pitch = rsrc->surface.u.legacy.level[src_level].nblk_x * rsrc->surface.bpe; in r600_dma_copy()
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D | evergreen_state.c | 782 pitch = surflevel[base_level].nblk_x * util_format_get_blockwidth(params->pipe_format); in evergreen_fill_tex_resource_words() 1123 pitch = (rtex->surface.u.legacy.level[level].nblk_x) / 8 - 1; in evergreen_set_color_surface_common() 1124 …slice = (rtex->surface.u.legacy.level[level].nblk_x * rtex->surface.u.legacy.level[level].nblk_y) … in evergreen_set_color_surface_common() 1386 assert(levelinfo->nblk_x % 8 == 0 && levelinfo->nblk_y % 8 == 0); in evergreen_init_depth_surface() 1391 surf->db_depth_size = S_028058_PITCH_TILE_MAX(levelinfo->nblk_x / 8 - 1) | in evergreen_init_depth_surface() 1393 surf->db_depth_slice = S_02805C_SLICE_TILE_MAX(levelinfo->nblk_x * in evergreen_init_depth_surface() 3719 …slice_tile_max = (rsrc->surface.u.legacy.level[src_level].nblk_x * rsrc->surface.u.legacy.level[sr… in evergreen_dma_copy_tile() 3744 …slice_tile_max = (rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.u.legacy.level[ds… in evergreen_dma_copy_tile() 3841 dst_pitch = rdst->surface.u.legacy.level[dst_level].nblk_x * rdst->surface.bpe; in evergreen_dma_copy() 3842 src_pitch = rsrc->surface.u.legacy.level[src_level].nblk_x * rsrc->surface.bpe; in evergreen_dma_copy()
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D | radeon_uvd.c | 1452 msg->body.decode.dt_pitch = luma->u.legacy.level[0].nblk_x * luma->blk_w; in ruvd_set_dt_surfaces()
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/external/mesa3d/src/amd/vulkan/ |
D | radv_image.c | 312 unsigned pitch = base_level_info->nblk_x * block_width; in si_set_mutable_tex_desc_fields() 644 metadata->u.legacy.stride = surface->u.legacy.level[0].nblk_x * surface->bpe; in radv_init_metadata() 697 out->slice_tile_max = (fmask.u.legacy.level[0].nblk_x * fmask.u.legacy.level[0].nblk_y) / 64; in radv_image_get_fmask_info() 702 out->pitch_in_pixels = fmask.u.legacy.level[0].nblk_x; in radv_image_get_fmask_info() 1259 pLayout->rowPitch = surface->u.legacy.level[level].nblk_x * surface->bpe; in radv_GetImageSubresourceLayout()
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D | radv_device.c | 3128 pitch_tile_max = level_info->nblk_x / 8 - 1; in radv_initialise_color_surface() 3129 slice_tile_max = (level_info->nblk_x * level_info->nblk_y) / 64 - 1; in radv_initialise_color_surface() 3428 ds->db_depth_size = S_028058_PITCH_TILE_MAX((level_info->nblk_x / 8) - 1) | in radv_initialise_ds_surface() 3430 ds->db_depth_slice = S_02805C_SLICE_TILE_MAX((level_info->nblk_x * level_info->nblk_y) / 64 - 1); in radv_initialise_ds_surface()
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