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Searched refs:new_instr (Results 1 – 13 of 13) sorted by relevance

/external/mesa3d/src/compiler/nir/
Dnir_lower_atomics_to_ssbo.c108 nir_intrinsic_instr *new_instr = in lower_instr() local
118 new_instr->src[0] = nir_src_for_ssa(buffer); in lower_instr()
119 nir_src_copy(&new_instr->src[1], &instr->src[0], new_instr); in lower_instr()
120 new_instr->src[2] = nir_src_for_ssa(temp); in lower_instr()
126 new_instr->src[0] = nir_src_for_ssa(buffer); in lower_instr()
127 nir_src_copy(&new_instr->src[1], &instr->src[0], new_instr); in lower_instr()
128 new_instr->src[2] = nir_src_for_ssa(temp); in lower_instr()
132 new_instr->src[0] = nir_src_for_ssa(buffer); in lower_instr()
133 nir_src_copy(&new_instr->src[1], &instr->src[0], new_instr); in lower_instr()
137 new_instr->src[0] = nir_src_for_ssa(buffer); in lower_instr()
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Dnir_lower_atomics.c101 nir_intrinsic_instr *new_instr = nir_intrinsic_instr_create(mem_ctx, op); in lower_instr() local
102 nir_intrinsic_set_base(new_instr, in lower_instr()
151 new_instr->src[0].is_ssa = true; in lower_instr()
152 new_instr->src[0].ssa = offset_def; in lower_instr()
158 nir_src_copy(&new_instr->src[i + 1], &instr->src[i], new_instr); in lower_instr()
161 nir_ssa_dest_init(&new_instr->instr, &new_instr->dest, in lower_instr()
164 nir_src_for_ssa(&new_instr->dest.ssa)); in lower_instr()
166 nir_dest_copy(&new_instr->dest, &instr->dest, mem_ctx); in lower_instr()
169 nir_instr_insert_before(&instr->instr, &new_instr->instr); in lower_instr()
Dnir_opt_constant_folding.c99 nir_load_const_instr *new_instr = in constant_fold_alu_instr() local
104 new_instr->value = dest; in constant_fold_alu_instr()
106 nir_instr_insert_before(&instr->instr, &new_instr->instr); in constant_fold_alu_instr()
109 nir_src_for_ssa(&new_instr->def)); in constant_fold_alu_instr()
/external/tensorflow/tensorflow/compiler/xla/service/
Dhlo_get_dimension_size_rewriter.cc50 HloInstruction* new_instr = computation->AddInstruction( in ReplaceGetSize() local
52 TF_RETURN_IF_ERROR(instr->ReplaceAllUsesWith(new_instr)); in ReplaceGetSize()
Dhlo_computation.cc157 HloInstruction* new_instr = in RemoveParameter() local
160 TF_RETURN_IF_ERROR(param_instruction->ReplaceAllUsesWith(new_instr)); in RemoveParameter()
161 param_instructions_[param_no] = new_instr; in RemoveParameter()
183 HloInstruction* new_instr = AddInstructionInternal( in RemoveUnusedParameters() local
186 TF_RETURN_IF_ERROR(param_instruction->ReplaceAllUsesWith(new_instr)); in RemoveUnusedParameters()
187 param_instructions_[param_no] = new_instr; in RemoveUnusedParameters()
966 HloInstruction* new_instr = replace(instr.get()); in CloneWithReplacements() local
967 if (!new_instr) { in CloneWithReplacements()
970 dfs_stack.push_back(new_instr); in CloneWithReplacements()
1025 HloInstruction* new_instr = context->GetInstruction(instr); in CloneWithReplacements() local
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Dwhile_loop_constant_sinking.cc29 HloInstruction* old_instr, HloInstruction* new_instr, in ReplaceUsesWhileKeepingLoopInvariance() argument
41 TF_RETURN_IF_ERROR(user->ReplaceOperandWith(i, new_instr)); in ReplaceUsesWhileKeepingLoopInvariance()
Dhlo_instructions.cc1503 HloInstruction* new_instr = parent()->AddInstruction( in CloneAndFuseInternal() local
1505 TF_CHECK_OK(ReplaceAllUsesWithDifferentShape(new_instr)); in CloneAndFuseInternal()
/external/mesa3d/src/gallium/drivers/freedreno/ir3/
Dir3_sched.c553 struct ir3_instruction *new_instr = NULL; in sched_block() local
561 new_instr = split_addr(ctx); in sched_block()
563 new_instr = split_pred(ctx); in sched_block()
570 if (new_instr) { in sched_block()
576 ir3_insert_by_depth(new_instr, &ctx->depth_list); in sched_block()
580 new_instr->block = block; in sched_block()
Dir3.c797 struct ir3_instruction *new_instr = instr_create(instr->block, in ir3_instr_clone() local
802 regs = new_instr->regs; in ir3_instr_clone()
803 *new_instr = *instr; in ir3_instr_clone()
804 new_instr->regs = regs; in ir3_instr_clone()
806 insert_instr(instr->block, new_instr); in ir3_instr_clone()
809 new_instr->regs_count = 0; in ir3_instr_clone()
813 ir3_reg_create(new_instr, reg->num, reg->flags); in ir3_instr_clone()
817 return new_instr; in ir3_instr_clone()
/external/tensorflow/tensorflow/compiler/xla/service/gpu/
Dcudnn_conv_pad_for_tensor_cores.cc89 auto add = [&](std::unique_ptr<HloInstruction> new_instr) { in PadConv() argument
90 return conv->parent()->AddInstruction(std::move(new_instr)); in PadConv()
Dcudnn_fused_conv_rewriter.cc267 TF_ASSIGN_OR_RETURN(auto new_instr, TryRewriteToCudnnForwardRelu(match)); in Run()
268 replacements.push_back({match.maximum, std::move(new_instr)}); in Run()
/external/v8/src/arm64/
Dinstructions-arm64.h85 V8_INLINE void SetInstructionBits(Instr new_instr) { in SetInstructionBits() argument
86 *reinterpret_cast<Instr*>(this) = new_instr; in SetInstructionBits()
/external/vixl/src/aarch64/
Dinstructions-aarch64.h163 void SetInstructionBits(Instr new_instr) { in SetInstructionBits() argument
164 *(reinterpret_cast<Instr*>(this)) = new_instr; in SetInstructionBits()