| /external/u-boot/drivers/clk/rockchip/ |
| D | clk_rk3288.c | 701 ulong new_rate, gclk_rate; in rk3288_clk_get_rate() local
706 new_rate = rkclk_pll_get_rate(priv->cru, clk->id); in rk3288_clk_get_rate()
714 new_rate = rockchip_mmc_get_clk(priv->cru, gclk_rate, clk->id); in rk3288_clk_get_rate()
719 new_rate = rockchip_spi_get_clk(priv->cru, gclk_rate, clk->id); in rk3288_clk_get_rate()
731 new_rate = rockchip_saradc_get_clk(priv->cru); in rk3288_clk_get_rate()
737 return new_rate; in rk3288_clk_get_rate()
744 ulong new_rate, gclk_rate; in rk3288_clk_set_rate() local
753 new_rate = rate; in rk3288_clk_set_rate()
756 new_rate = rkclk_configure_ddr(priv->cru, priv->grf, rate); in rk3288_clk_set_rate()
764 new_rate = rockchip_mmc_set_clk(cru, gclk_rate, clk->id, rate); in rk3288_clk_set_rate()
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| D | clk_rk3188.c | 461 ulong new_rate, gclk_rate; in rk3188_clk_get_rate() local
466 new_rate = rkclk_pll_get_rate(priv->cru, clk->id); in rk3188_clk_get_rate()
474 new_rate = rockchip_mmc_get_clk(priv->cru, PERI_HCLK_HZ, in rk3188_clk_get_rate()
479 new_rate = rockchip_spi_get_clk(priv->cru, PERI_PCLK_HZ, in rk3188_clk_get_rate()
492 return new_rate; in rk3188_clk_get_rate()
499 ulong new_rate; in rk3188_clk_set_rate() local
503 new_rate = rkclk_configure_cpu(priv->cru, priv->grf, rate, in rk3188_clk_set_rate()
507 new_rate = rkclk_configure_ddr(priv->cru, priv->grf, rate, in rk3188_clk_set_rate()
516 new_rate = rockchip_mmc_set_clk(cru, PERI_HCLK_HZ, in rk3188_clk_set_rate()
521 new_rate = rockchip_spi_set_clk(cru, PERI_PCLK_HZ, in rk3188_clk_set_rate()
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| D | clk_rv1108.c | 174 ulong new_rate; in rv1108_clk_set_rate() local
178 new_rate = rv1108_mac_set_clk(priv->cru, rate); in rv1108_clk_set_rate()
181 new_rate = rv1108_sfc_set_clk(priv->cru, rate); in rv1108_clk_set_rate()
184 new_rate = rv1108_saradc_set_clk(priv->cru, rate); in rv1108_clk_set_rate()
190 return new_rate; in rv1108_clk_set_rate()
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| D | clk_rk3128.c | 508 ulong new_rate, gclk_rate; in rk3128_clk_set_rate() local
517 new_rate = rk3128_vop_set_clk(priv->cru, in rk3128_clk_set_rate()
521 new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate, in rk3128_clk_set_rate()
529 new_rate = rk3128_peri_set_pclk(priv->cru, clk->id, rate); in rk3128_clk_set_rate()
532 new_rate = rk3128_saradc_set_clk(priv->cru, rate); in rk3128_clk_set_rate()
538 return new_rate; in rk3128_clk_set_rate()
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| D | clk_rk322x.c | 373 ulong new_rate, gclk_rate; in rk322x_clk_set_rate() local
381 new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate, in rk322x_clk_set_rate()
385 new_rate = rk322x_ddr_set_clk(priv->cru, rate); in rk322x_clk_set_rate()
388 new_rate = rk322x_mac_set_clk(priv->cru, rate); in rk322x_clk_set_rate()
396 return new_rate; in rk322x_clk_set_rate()
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| D | clk_rk3036.c | 294 ulong new_rate, gclk_rate; in rk3036_clk_set_rate() local
302 new_rate = rockchip_mmc_set_clk(priv->cru, gclk_rate, in rk3036_clk_set_rate()
309 return new_rate; in rk3036_clk_set_rate()
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| D | clk_rk3368.c | 224 ulong new_rate = parent_rate / adj_div; in rk3368_mmc_find_best_rate_and_parent() local
234 if (new_rate <= best_rate) in rk3368_mmc_find_best_rate_and_parent()
238 best_rate = new_rate; in rk3368_mmc_find_best_rate_and_parent()
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| /external/u-boot/drivers/clk/aspeed/ |
| D | clk_ast2500.c | 336 ulong new_rate; in ast2500_configure_d2pll() local
350 new_rate = ast2500_calc_clock_config(clkin, rate, &div_cfg); in ast2500_configure_d2pll()
373 return new_rate; in ast2500_configure_d2pll()
380 ulong new_rate; in ast2500_clk_set_rate() local
384 new_rate = ast2500_configure_ddr(priv->scu, rate); in ast2500_clk_set_rate()
387 new_rate = ast2500_configure_d2pll(priv->scu, rate); in ast2500_clk_set_rate()
393 return new_rate; in ast2500_clk_set_rate()
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| /external/u-boot/drivers/clk/ |
| D | clk_zynq.c | 292 ulong new_rate, best_rate = 0; in zynq_clk_calc_peripheral_two_divs() local
297 new_rate = DIV_ROUND_CLOSEST( in zynq_clk_calc_peripheral_two_divs()
299 new_err = abs(new_rate - rate); in zynq_clk_calc_peripheral_two_divs()
305 best_rate = new_rate; in zynq_clk_calc_peripheral_two_divs()
319 ulong pll_rate, new_rate; in zynq_clk_set_peripheral_rate() local
330 new_rate = zynq_clk_calc_peripheral_two_divs(rate, pll_rate, in zynq_clk_set_peripheral_rate()
337 new_rate = DIV_ROUND_CLOSEST(rate, div0); in zynq_clk_set_peripheral_rate()
345 return new_rate; in zynq_clk_set_peripheral_rate()
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| D | clk_zynqmp.c | 496 ulong new_rate, best_rate = 0; in zynqmp_clk_calc_peripheral_two_divs() local
501 new_rate = DIV_ROUND_CLOSEST( in zynqmp_clk_calc_peripheral_two_divs()
503 new_err = abs(new_rate - rate); in zynqmp_clk_calc_peripheral_two_divs()
509 best_rate = new_rate; in zynqmp_clk_calc_peripheral_two_divs()
523 ulong pll_rate, new_rate; in zynqmp_clk_set_peripheral_rate() local
543 new_rate = zynqmp_clk_calc_peripheral_two_divs(rate, pll_rate, in zynqmp_clk_set_peripheral_rate()
550 new_rate = DIV_ROUND_CLOSEST(rate, div0); in zynqmp_clk_set_peripheral_rate()
563 return new_rate; in zynqmp_clk_set_peripheral_rate()
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| /external/u-boot/arch/arm/cpu/armv7/bcm235xx/ |
| D | clk-core.c | 165 unsigned long new_rate = 0, div = 1; in peri_clk_set_rate() local
186 new_rate = ref->clk.rate / div; in peri_clk_set_rate()
189 if (abs(new_rate - rate) < diff) { in peri_clk_set_rate()
190 diff = abs(new_rate - rate); in peri_clk_set_rate()
193 c->rate = new_rate; in peri_clk_set_rate()
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| /external/u-boot/arch/arm/cpu/armv7/bcm281xx/ |
| D | clk-core.c | 165 unsigned long new_rate = 0, div = 1; in peri_clk_set_rate() local
186 new_rate = ref->clk.rate / div; in peri_clk_set_rate()
189 if (abs(new_rate - rate) < diff) { in peri_clk_set_rate()
190 diff = abs(new_rate - rate); in peri_clk_set_rate()
193 c->rate = new_rate; in peri_clk_set_rate()
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| /external/adhd/cras/src/server/ |
| D | dev_stream.c | 177 double new_rate = dev_rate * dev_rate_ratio / in dev_stream_set_dev_rate() local
183 new_rate); in dev_stream_set_dev_rate()
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