| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
| D | basic-a64-diagnostics.s | 719 ngcs wsp, w3
720 ngcs w9, wsp
721 ngcs sp, x9
722 ngcs x2, sp
|
| D | basic-a64-instructions.s | 938 ngcs w3, w12
939 ngcs wzr, w9
940 ngcs w23, wzr
945 ngcs x29, x30
946 ngcs xzr, x0
947 ngcs x0, xzr
|
| /external/llvm/test/MC/AArch64/ |
| D | basic-a64-diagnostics.s | 714 ngcs wsp, w3
715 ngcs w9, wsp
716 ngcs sp, x9
717 ngcs x2, sp
|
| D | basic-a64-instructions.s | 938 ngcs w3, w12
939 ngcs wzr, w9
940 ngcs w23, wzr
945 ngcs x29, x30
946 ngcs xzr, x0
947 ngcs x0, xzr
|
| /external/capstone/suite/MC/AArch64/ |
| D | basic-a64-instructions.s.cs | 370 0xe9,0x03,0x0a,0x7a = ngcs w9, w10
374 0xe9,0x03,0x0a,0xfa = ngcs x9, x10
382 0xe3,0x03,0x0c,0x7a = ngcs w3, w12
383 0xff,0x03,0x09,0x7a = ngcs wzr, w9
384 0xf7,0x03,0x1f,0x7a = ngcs w23, wzr
385 0xfd,0x03,0x1e,0xfa = ngcs x29, x30
386 0xff,0x03,0x00,0xfa = ngcs xzr, x0
387 0xe0,0x03,0x1f,0xfa = ngcs x0, xzr
|
| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | basic-a64-instructions.txt | 558 # CHECK: ngcs w9, w10
567 # CHECK: ngcs x9, x10
588 # CHECK: ngcs w3, w12
589 # CHECK: ngcs wzr, w9
590 # CHECK: ngcs w23, wzr
595 # CHECK: ngcs x29, x30
596 # CHECK: ngcs xzr, x0
597 # CHECK: ngcs x0, xzr
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
| D | basic-a64-instructions.txt | 559 # CHECK: ngcs w9, w10
568 # CHECK: ngcs x9, x10
589 # CHECK: ngcs w3, w12
590 # CHECK: ngcs wzr, w9
591 # CHECK: ngcs w23, wzr
596 # CHECK: ngcs x29, x30
597 # CHECK: ngcs xzr, x0
598 # CHECK: ngcs x0, xzr
|
| /external/v8/src/arm64/ |
| D | assembler-arm64.h | 1219 void ngcs(const Register& rd,
|
| D | assembler-arm64.cc | 1197 void Assembler::ngcs(const Register& rd, const Operand& operand) { in ngcs() function in v8::internal::Assembler
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 681 void ngcs(const Register& rd, const Operand& operand);
|
| D | assembler-aarch64.cc | 555 void Assembler::ngcs(const Register& rd, const Operand& operand) { in ngcs() function in vixl::aarch64::Assembler
|
| /external/vixl/test/test-trace-reference/ |
| D | log-disasm-colour | 207 0x~~~~~~~~~~~~~~~~ 7a1903f8 ngcs w24, w25
208 0x~~~~~~~~~~~~~~~~ fa1b03fa ngcs x26, x27
|
| D | log-disasm | 207 0x~~~~~~~~~~~~~~~~ 7a1903f8 ngcs w24, w25
208 0x~~~~~~~~~~~~~~~~ fa1b03fa ngcs x26, x27
|
| D | log-cpufeatures-custom | 207 0x~~~~~~~~~~~~~~~~ 7a1903f8 ngcs w24, w25
208 0x~~~~~~~~~~~~~~~~ fa1b03fa ngcs x26, x27
|
| D | log-cpufeatures | 207 0x~~~~~~~~~~~~~~~~ 7a1903f8 ngcs w24, w25
208 0x~~~~~~~~~~~~~~~~ fa1b03fa ngcs x26, x27
|
| D | log-cpufeatures-colour | 207 0x~~~~~~~~~~~~~~~~ 7a1903f8 ngcs w24, w25
208 0x~~~~~~~~~~~~~~~~ fa1b03fa ngcs x26, x27
|
| D | log-all | 523 0x~~~~~~~~~~~~~~~~ 7a1903f8 ngcs w24, w25
526 0x~~~~~~~~~~~~~~~~ fa1b03fa ngcs x26, x27
|
| /external/vixl/test/aarch64/ |
| D | test-trace-aarch64.cc | 260 __ ngcs(w24, w25); in GenerateTestSequenceBase() local
261 __ ngcs(x26, x27); in GenerateTestSequenceBase() local
|
| D | test-disasm-aarch64.cc | 494 COMPARE(ngcs(w28, Operand(w29)), "ngcs w28, w29"); in TEST()
495 COMPARE(ngcs(x30, Operand(x0)), "ngcs x30, x0"); in TEST()
|
| D | test-cpu-features-aarch64.cc | 391 TEST_NONE(ngcs_0, ngcs(w0, w1))
392 TEST_NONE(ngcs_1, ngcs(x0, x1))
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 871 void ngcs(const Register& rd, const Operand& operand)
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 610 def : InstAlias<"ngcs $dst, $src", (SBCSWr GPR32:$dst, WZR, GPR32:$src)>;
611 def : InstAlias<"ngcs $dst, $src", (SBCSXr GPR64:$dst, XZR, GPR64:$src)>;
|
| /external/capstone/arch/AArch64/ |
| D | AArch64GenAsmWriter.inc | 10487 AsmString = "ngcs $\x01, $\x03";
10499 AsmString = "ngcs $\x01, $\x03";
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 809 def : InstAlias<"ngcs $dst, $src", (SBCSWr GPR32:$dst, WZR, GPR32:$src)>;
810 def : InstAlias<"ngcs $dst, $src", (SBCSXr GPR64:$dst, XZR, GPR64:$src)>;
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenAsmMatcher.inc | 11886 "ngcs\003nop\003nor\004nors\003not\004nots\003orn\004orns\003orr\004orrs"
15808 …{ 3159 /* ngcs */, AArch64::SBCSWr, Convert__Reg1_0__regWZR__Reg1_1, 0, { MCK_GPR32, MCK_GPR32 }, …
15809 …{ 3159 /* ngcs */, AArch64::SBCSXr, Convert__Reg1_0__regXZR__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, …
22277 …{ 3159 /* ngcs */, AArch64::SBCSWr, Convert__Reg1_0__regWZR__Reg1_1, 0, { MCK_GPR32, MCK_GPR32 }, …
22278 …{ 3159 /* ngcs */, AArch64::SBCSXr, Convert__Reg1_0__regXZR__Reg1_1, 0, { MCK_GPR64, MCK_GPR64 }, …
|