| /external/llvm/test/MC/Mips/ |
| D | nooddspreg-cmdarg.s | 1 # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64,+nooddspreg | \
4 # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64,+nooddspreg -filetype=obj -o - | \
8 # RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n32 -mattr=+nooddspreg 2> %t0
11 # RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n64 -mattr=+nooddspreg 2> %t0
14 # CHECK-ASM-NOT: .module nooddspreg
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| D | set-oddspreg-nooddspreg.s | 1 # RUN: llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r2 -mattr=+nooddspreg | \
6 .set nooddspreg define
10 # CHECK: .set nooddspreg
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| D | set-oddspreg-nooddspreg-error.s | 1 # RUN: not llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32 -mattr=+nooddspreg 2>%t1
8 .set nooddspreg define
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| D | update-module-level-options.s | 1 # RUN: not llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64,-nooddspreg 2>&1 | \
4 .module nooddspreg
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| D | nooddspreg-error.s | 5 .module nooddspreg
6 # CHECK-ASM: .module nooddspreg
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| D | nooddspreg.s | 14 # CHECK-ASM: .module nooddspreg
40 .module nooddspreg
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/ |
| D | nooddspreg-cmdarg.s | 1 # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64,+nooddspreg | \
4 # RUN: llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64,+nooddspreg -filetype=obj -o - | \
8 # RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n32 -mattr=+nooddspreg 2> %t0
11 # RUN: not llvm-mc %s -arch=mips -mcpu=mips64 -target-abi n64 -mattr=+nooddspreg 2> %t0
14 # CHECK-ASM-NOT: .module nooddspreg
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| D | set-oddspreg-nooddspreg.s | 1 # RUN: llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32r2 -mattr=+nooddspreg | \
6 .set nooddspreg define
10 # CHECK: .set nooddspreg
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| D | set-oddspreg-nooddspreg-error.s | 1 # RUN: not llvm-mc %s -triple=mips-unknown-linux -mcpu=mips32 -mattr=+nooddspreg 2>%t1
8 .set nooddspreg define
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| D | update-module-level-options.s | 1 # RUN: not llvm-mc %s -arch=mips -mcpu=mips32 -mattr=+fp64,-nooddspreg 2>&1 | \
4 .module nooddspreg
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| D | nooddspreg-error.s | 5 .module nooddspreg
6 # CHECK-ASM: .module nooddspreg
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| D | nooddspreg.s | 14 # CHECK-ASM: .module nooddspreg
40 .module nooddspreg
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| /external/llvm/test/CodeGen/Mips/ |
| D | no-odd-spreg.ll | 2 ; RUN: llc -march=mipsel -mcpu=mips32 -mattr=+nooddspreg < %s | FileCheck %s -check-prefixes=ALL,NO…
4 ; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=fp64,+nooddspreg < %s | FileCheck %s -check-prefixes…
5 ; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=fpxx,-nooddspreg < %s | FileCheck %s -check-prefixes…
11 ; NOODDSPREG: .module nooddspreg
58 ; INVALID: -mattr=+nooddspreg is not currently permitted for a 32-bit FPU register file (FR=0 mode).
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| D | fp64a.ll | 15 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=fp64,nooddspreg < %s | FileCheck %s -check-prefixes=AL…
17 ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fp64,nooddspreg < %s | FileCheck %s -check-prefixes=…
20 ; RUN: not llc -march=mips64 -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-pr…
22 ; RUN: not llc -march=mips64el -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-…
24 ; 64-FP64A: LLVM ERROR: -mattr=+nooddspreg requires the O32 ABI.
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| D | no-odd-spreg-msa.ll | 1 ; RUN: llc -march=mipsel -mcpu=mips32 -mattr=+fp64,+msa,-nooddspreg \
4 ; RUN: llc -march=mipsel -mcpu=mips32 -mattr=+fp64,+msa,+nooddspreg \
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| D | fastcc.ll | 4 ; RUN: llc < %s -march=mipsel -mcpu=mips32 -mattr=+nooddspreg -relocation-model=pic | FileCheck %s …
5 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -mattr=+fp64,+nooddspreg -relocation-model=pic | FileC…
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/ |
| D | no-odd-spreg.ll | 2 ; RUN: llc -march=mipsel -mcpu=mips32 -mattr=+nooddspreg < %s | FileCheck -allow-deprecated-dag-ove…
4 ; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=fp64,+nooddspreg < %s | FileCheck -allow-deprecated-…
5 ; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=fpxx,-nooddspreg < %s | FileCheck -allow-deprecated-…
11 ; NOODDSPREG: .module nooddspreg
61 ; INVALID: -mattr=+nooddspreg is not currently permitted for a 32-bit FPU register file (FR=0 mode).
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| D | fp64a.ll | 15 ; RUN: llc -march=mips -mcpu=mips32r2 -mattr=fp64,nooddspreg < %s | FileCheck %s -check-prefixes=AL…
17 ; RUN: llc -march=mipsel -mcpu=mips32r2 -mattr=fp64,nooddspreg < %s | FileCheck %s -check-prefixes=…
20 ; RUN: not llc -march=mips64 -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-pr…
22 ; RUN: not llc -march=mips64el -mcpu=mips64 -mattr=fp64,nooddspreg < %s 2>&1 | FileCheck %s -check-…
24 ; 64-FP64A: LLVM ERROR: -mattr=+nooddspreg requires the O32 ABI.
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| D | buildpairf64-extractelementf64-implicit-sp.ll | 7 ; RUN: -mcpu=mips32r6 -mattr=+fp64,+nooddspreg \
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| D | no-odd-spreg-msa.ll | 1 ; RUN: llc -march=mipsel -mcpu=mips32 -mattr=+fp64,+msa,-nooddspreg \
4 ; RUN: llc -march=mipsel -mcpu=mips32 -mattr=+fp64,+msa,+nooddspreg \
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| D | fastcc.ll | 4 ; RUN: llc < %s -march=mipsel -mcpu=mips32 -mattr=+nooddspreg -relocation-model=pic -mips-tail-call…
5 ; RUN: llc < %s -march=mipsel -mcpu=mips32r2 -mattr=+fp64,+nooddspreg -relocation-model=pic -mips-t…
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/msa/ |
| D | msa-nooddspreg.ll | 1 ; RUN: llc -march=mips -mcpu=mips32r5 -mattr=+fp64,+msa,+nooddspreg < %s | FileCheck %s
3 ; Test that the register allocator honours +nooddspreg and does not pick an odd
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/llvm-ir/ |
| D | call.ll | 8 ; RUN: llc -march=mips -mcpu=mips32r6 -relocation-model=pic -mattr=+fp64,+nooddspreg -disable-mip…
20 ; RUN: llc -march=mips -mcpu=mips32r6 -relocation-model=pic -mattr=+fp64,+nooddspreg -disable-mip…
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| /external/llvm/test/CodeGen/Mips/llvm-ir/ |
| D | call.ll | 9 ; RUN: llc -march=mips -mcpu=mips32r6 -relocation-model=pic -mattr=+fp64,+nooddspreg -disable-mip…
|
| /external/llvm/lib/Target/Mips/ |
| D | Mips.td | 82 def FeatureNoOddSPReg : SubtargetFeature<"nooddspreg", "UseOddSPReg", "false",
|