/external/llvm/test/CodeGen/Mips/llvm-ir/ |
D | not.ll | 40 ; MM: not16 $2, $4 54 ; MM: not16 $2, $4 68 ; MM: not16 $2, $4 82 ; MM: not16 $2, $4 98 ; MM32: not16 $2, $4 99 ; MM32: not16 $3, $5 121 ; MM32: not16 $2, $4 122 ; MM32: not16 $3, $5 123 ; MM32: not16 $4, $6 124 ; MM32: not16 $5, $7 [all …]
|
D | lshr.ll | 127 ; MMR3: not16 $[[T2:[0-9]+]], $7 138 ; MMR6: not16 $[[T2:[0-9]+]], $7
|
D | ashr.ll | 133 ; MMR3: not16 $[[T2:[0-9]+]], $7 150 ; MMR6: not16 $[[T8:[0-9]+]], $7
|
D | shl.ll | 143 ; MMR3: not16 $[[T2:[0-9]+]], $7 154 ; MMR6: not16 $[[T2:[0-9]+]], $7
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/llvm-ir/ |
D | not.ll | 38 ; MM: not16 $2, $4 52 ; MM: not16 $2, $4 66 ; MM: not16 $2, $4 81 ; MM: not16 $2, $4 97 ; MM32: not16 $2, $4 98 ; MM32: not16 $3, $5 117 ; MM32: not16 $2, $4 118 ; MM32: not16 $3, $5 119 ; MM32: not16 $4, $6 120 ; MM32: not16 $5, $7
|
D | ashr.ll | 368 ; MMR3-NEXT: not16 $3, $7 388 ; MMR6-NEXT: not16 $6, $7 803 ; MMR3-NEXT: not16 $3, $16 828 ; MMR3-NEXT: not16 $5, $2 838 ; MMR3-NEXT: not16 $4, $7 892 ; MMR6-NEXT: not16 $7, $7 899 ; MMR6-NEXT: not16 $16, $3 915 ; MMR6-NEXT: not16 $16, $2
|
D | lshr.ll | 393 ; MMR3-NEXT: not16 $3, $7 407 ; MMR6-NEXT: not16 $2, $7 839 ; MMR3-NEXT: not16 $3, $16 855 ; MMR3-NEXT: not16 $5, $3 866 ; MMR3-NEXT: not16 $3, $7 914 ; MMR6-NEXT: not16 $5, $3 926 ; MMR6-NEXT: not16 $16, $5 947 ; MMR6-NEXT: not16 $2, $2
|
D | shl.ll | 425 ; MMR3-NEXT: not16 $2, $7 439 ; MMR6-NEXT: not16 $2, $7 868 ; MMR3-NEXT: not16 $4, $16 885 ; MMR3-NEXT: not16 $2, $4 897 ; MMR3-NEXT: not16 $3, $6 943 ; MMR6-NEXT: not16 $2, $3 960 ; MMR6-NEXT: not16 $17, $17 970 ; MMR6-NEXT: not16 $17, $4
|
/external/llvm/test/MC/Mips/ |
D | micromips-16-bit-instructions.s | 16 # CHECK-EL: not16 $17, $3 # encoding: [0x0b,0x44] 71 # CHECK-EB: not16 $17, $3 # encoding: [0x44,0x0b] 124 not16 $17, $3
|
D | micromips-invalid.s | 13 not16 $18, $9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/ |
D | micromips-16-bit-instructions.s | 16 # CHECK-EL: not16 $17, $3 # encoding: [0x0b,0x44] 71 # CHECK-EB: not16 $17, $3 # encoding: [0x44,0x0b] 124 not16 $17, $3
|
D | micromips-invalid.s | 13 not16 $18, $9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
/external/u-boot/board/armltd/integrator/ |
D | lowlevel_init.S | 130 bne not16 134 not16: label
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/ |
D | micromips-not16.ll | 26 ; CHECK: not16
|
/external/llvm/test/CodeGen/Mips/ |
D | micromips-not16.ll | 26 ; CHECK: not16
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips/ |
D | valid.s | 24 not16 $17, $3 # CHECK: not16 $17, $3 # encoding: [0x44,0x0b] label
|
/external/llvm/test/MC/Mips/micromips64r6/ |
D | valid.s | 34 not16 $4, $7 # CHECK: not16 $4, $7 # encoding: [0x46,0x70]
|
/external/llvm/test/MC/Mips/micromips32r6/ |
D | valid.s | 249 not16 $4, $7 # CHECK: not16 $4, $7 # encoding: [0x46,0x70]
|
/external/llvm/test/MC/Disassembler/Mips/micromips32r3/ |
D | valid-el.txt | 14 0x0b 0x44 # CHECK: not16 $17, $3
|
D | valid.txt | 14 0x44 0x0b # CHECK: not16 $17, $3
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Mips/micromips32r6/ |
D | valid.s | 294 not16 $4, $7 # CHECK: not16 $4, $7 # encoding: [0x46,0x70]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/micromips32r3/ |
D | valid-el.txt | 14 0x0b 0x44 # CHECK: not16 $17, $3
|
D | valid.txt | 14 0x44 0x0b # CHECK: not16 $17, $3
|
/external/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
D | valid.txt | 28 0x46 0x70 # CHECK: not16 $4, $7
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/Mips/micromips32r6/ |
D | valid.txt | 28 0x46 0x70 # CHECK: not16 $4, $7
|