Searched refs:num_of_total_pups (Results 1 – 5 of 5) sorted by relevance
109 pup < dram_info->num_of_total_pups; in ddr3_write_leveling_hw()138 pup < dram_info->num_of_total_pups; in ddr3_write_leveling_hw()415 if (sum < (WL_HI_FREQ_STATE * (dram_info->num_of_total_pups))) { in ddr3_wl_supplement()432 for (pup = 0; pup < dram_info->num_of_total_pups; pup++) { in ddr3_wl_supplement()488 for (pup = 0; pup <= dram_info->num_of_total_pups; pup++) { in ddr3_write_leveling_hw_reg_dimm()532 pup < dram_info->num_of_total_pups; in ddr3_write_leveling_hw_reg_dimm()576 pup < dram_info->num_of_total_pups; in ddr3_write_leveling_hw_reg_dimm()608 for (pup = 0; pup <= dram_info->num_of_total_pups; in ddr3_write_leveling_hw_reg_dimm()621 pup < dram_info->num_of_total_pups; in ddr3_write_leveling_hw_reg_dimm()637 for (pup = 0; pup <= dram_info->num_of_total_pups; in ddr3_write_leveling_hw_reg_dimm()[all …]
104 pups = dram_info->num_of_total_pups; in ddr3_pbs_tx()105 max_pup = dram_info->num_of_total_pups; in ddr3_pbs_tx()547 pups = dram_info->num_of_total_pups; in ddr3_pbs_rx()548 max_pup = dram_info->num_of_total_pups; in ddr3_pbs_rx()1424 max_pup = dram_info->num_of_total_pups; in ddr3_set_pbs_results()
100 pup < dram_info->num_of_total_pups; in ddr3_read_leveling_hw()131 pup < (dram_info->num_of_total_pups); in ddr3_read_leveling_hw()730 for (pup = 0; pup < dram_info->num_of_total_pups; pup++) { in ddr3_read_leveling_single_cs_rl_mode()1205 for (pup = 0; pup < dram_info->num_of_total_pups; pup++) { in ddr3_read_leveling_single_cs_window_mode()
120 dram_info.num_of_total_pups = ddr_width / PUP_SIZE + dram_info.ecc_ena; in ddr3_hw_training()718 for (pup = 0; pup < dram_info->num_of_total_pups; in ddr3_save_training()1053 for (pup = 0; pup < dram_info->num_of_total_pups; pup++) { in ddr3_get_min_max_rl_phase()
255 u32 num_of_total_pups; /* numOfStdPups + eccEna */ member