Searched refs:opNode (Results 1 – 8 of 8) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Nios2/ |
D | Nios2InstrInfo.td | 43 multiclass ArithLogicRegImm16<bits<6> op, string mnemonic, SDNode opNode, 49 (opNode CPURegs:$rA, immType:$imm))], 55 SDNode opNode>: 59 [(set CPURegs:$rC, (opNode CPURegs:$rA, CPURegs:$rB))],
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/external/skia/src/gpu/ |
D | GrAuditTrail.cpp | 48 OpNode* opNode = new OpNode(proxyID); in addOp() local 49 opNode->fBounds = op->bounds(); in addOp() 50 opNode->fChildren.push_back(auditOp); in addOp() 51 fOpList.emplace_back(opNode); in addOp()
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/external/skqp/src/gpu/ |
D | GrAuditTrail.cpp | 48 OpNode* opNode = new OpNode(proxyID); in addOp() local 49 opNode->fBounds = op->bounds(); in addOp() 50 opNode->fChildren.push_back(auditOp); in addOp() 51 fOpList.emplace_back(opNode); in addOp()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
D | LanaiInstrInfo.td | 556 class LoadSPLS<string asmstring, PatFrag opNode> 559 [(set (i32 GPR:$Rd), (opNode ADDRspls:$src))]>, 654 class StoreSPLS<string asmstring, PatFrag opNode> 657 [(opNode (i32 GPR:$Rd), ADDRspls:$dst)]>,
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/external/llvm/lib/Target/Lanai/ |
D | LanaiInstrInfo.td | 558 class LoadSPLS<string asmstring, PatFrag opNode> 561 [(set (i32 GPR:$Rd), (opNode ADDRspls:$src))]>, 656 class StoreSPLS<string asmstring, PatFrag opNode> 659 [(opNode (i32 GPR:$Rd), ADDRspls:$dst)]>,
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 4139 // In effect, opNode is the same as (scalar_to_vector (IntNode)). 4141 SDPatternOperator opNode> { 4142 // If a lane instruction caught the vector_extract around opNode, we can 4144 def : Pat<(v8i8 (opNode V64:$Rn)), 4147 def : Pat<(v16i8 (opNode V128:$Rn)), 4150 def : Pat<(v4i16 (opNode V64:$Rn)), 4153 def : Pat<(v8i16 (opNode V128:$Rn)), 4156 def : Pat<(v4i32 (opNode V128:$Rn)), 4162 def : Pat<(i32 (vector_extract (insert_subvector undef, (v8i8 (opNode V64:$Rn)), 4167 def : Pat<(i32 (vector_extract (v16i8 (opNode V128:$Rn)), (i64 0))), [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 4470 // In effect, opNode is the same as (scalar_to_vector (IntNode)). 4472 SDPatternOperator opNode> { 4473 // If a lane instruction caught the vector_extract around opNode, we can 4475 def : Pat<(v8i8 (opNode V64:$Rn)), 4478 def : Pat<(v16i8 (opNode V128:$Rn)), 4481 def : Pat<(v4i16 (opNode V64:$Rn)), 4484 def : Pat<(v8i16 (opNode V128:$Rn)), 4487 def : Pat<(v4i32 (opNode V128:$Rn)), 4493 def : Pat<(i32 (vector_extract (insert_subvector undef, (v8i8 (opNode V64:$Rn)), 4498 def : Pat<(i32 (vector_extract (v16i8 (opNode V128:$Rn)), (i64 0))), [all …]
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/external/deqp-deps/glslang/glslang/MachineIndependent/ |
D | ParseHelper.cpp | 1245 TIntermOperator* opNode = node.getAsOperator(); in computeBuiltinPrecisions() local 1246 if (opNode == nullptr) in computeBuiltinPrecisions() 1296 opNode->getQualifier().precision = EpqNone; in computeBuiltinPrecisions() 1298 opNode->propagatePrecision(operationPrecision); in computeBuiltinPrecisions() 1299 opNode->setOperationPrecision(operationPrecision); in computeBuiltinPrecisions() 1302 opNode->getQualifier().precision = resultPrecision; in computeBuiltinPrecisions()
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