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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/SVE/
Dorr-diagnostics.s6 orr z5.b, z5.b, #0xfa label
11 orr z5.b, z5.b, #0xfff9 label
16 orr z5.h, z5.h, #0xfffa label
21 orr z5.h, z5.h, #0xfffffff9 label
26 orr z5.s, z5.s, #0xfffffffa label
31 orr z5.s, z5.s, #0xffffffffffffff9 label
36 orr z15.d, z15.d, #0xfffffffffffffffa label
44 orr z7.d, z8.d, #254 label
49 orr z0.d, p0/m, z1.d, z2.d label
55 orr z21.d, z5.d, z26.b label
[all …]
Dorr.s12 orr z5.b, z5.b, #0xf9 label
18 orr z23.h, z23.h, #0xfff9 label
24 orr z0.s, z0.s, #0xfffffff9 label
30 orr z0.d, z0.d, #0xfffffffffffffff9 label
36 orr z5.b, z5.b, #0x6 label
42 orr z23.h, z23.h, #0x6 label
48 orr z0.s, z0.s, #0x6 label
54 orr z0.d, z0.d, #0x6 label
60 orr z0.d, z0.d, z0.d // should use mov-alias label
66 orr z23.d, z13.d, z8.d // should not use mov-alias label
[all …]
/external/capstone/suite/MC/AArch64/
Dneon-mov.s.cs41 0x20,0x14,0x00,0x0f = orr v0.2s, #0x1
42 0x01,0x14,0x00,0x0f = orr v1.2s, #0x0
43 0x20,0x34,0x00,0x0f = orr v0.2s, #0x1, lsl #8
44 0x20,0x54,0x00,0x0f = orr v0.2s, #0x1, lsl #16
45 0x20,0x74,0x00,0x0f = orr v0.2s, #0x1, lsl #24
46 0x20,0x14,0x00,0x4f = orr v0.4s, #0x1
47 0x20,0x34,0x00,0x4f = orr v0.4s, #0x1, lsl #8
48 0x20,0x54,0x00,0x4f = orr v0.4s, #0x1, lsl #16
49 0x20,0x74,0x00,0x4f = orr v0.4s, #0x1, lsl #24
50 0x3f,0x94,0x00,0x0f = orr v31.4h, #0x1
[all …]
/external/llvm/test/MC/AArch64/
Dneon-mov.s102 orr v0.2s, #1
103 orr v1.2s, #0
104 orr v0.2s, #1, lsl #8
105 orr v0.2s, #1, lsl #16
106 orr v0.2s, #1, lsl #24
107 orr v0.4s, #1
108 orr v0.4s, #1, lsl #8
109 orr v0.4s, #1, lsl #16
110 orr v0.4s, #1, lsl #24
111 orr v31.4h, #1
[all …]
Darm64-aliases.s27 orr x2, xzr, x9
29 orr w2, wzr, w9
190 orr x20, xzr, #0xaaaaaaaaaaaaaaaa
191 orr w15, wzr, #0xaaaaaaaa
198 orr x3, xzr, #0x1
199 orr w3, wzr, #0x1
200 orr x3, xzr, #0x10000
201 orr w3, wzr, #0x10000
202 orr x3, xzr, #0x700000000
203 orr x3, xzr, #0x3000000000000
[all …]
Darm64-logical-encoding.s34 orr w1, w2, #0x4000
35 orr x1, x2, #0x8000
37 ; CHECK: orr w1, w2, #0x4000 ; encoding: [0x41,0x00,0x12,0x32]
38 ; CHECK: orr x1, x2, #0x8000 ; encoding: [0x41,0x00,0x71,0xb2]
40 orr w8, wzr, #0x1
41 orr x8, xzr, #0x1
43 ; CHECK: orr w8, wzr, #0x1 ; encoding: [0xe8,0x03,0x00,0x32]
44 ; CHECK: orr x8, xzr, #0x1 ; encoding: [0xe8,0x03,0x40,0xb2]
182 orr w1, w2, w3
183 orr x1, x2, x3
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dneon-mov.s102 orr v0.2s, #1
103 orr v1.2s, #0
104 orr v0.2s, #1, lsl #8
105 orr v0.2s, #1, lsl #16
106 orr v0.2s, #1, lsl #24
107 orr v0.4s, #1
108 orr v0.4s, #1, lsl #8
109 orr v0.4s, #1, lsl #16
110 orr v0.4s, #1, lsl #24
111 orr v31.4h, #1
[all …]
Darm64-aliases.s27 orr x2, xzr, x9
29 orr w2, wzr, w9
190 orr x20, xzr, #0xaaaaaaaaaaaaaaaa
191 orr w15, wzr, #0xaaaaaaaa
198 orr x3, xzr, #0x1
199 orr w3, wzr, #0x1
200 orr x3, xzr, #0x10000
201 orr w3, wzr, #0x10000
202 orr x3, xzr, #0x700000000
203 orr x3, xzr, #0x3000000000000
[all …]
Darm64-logical-encoding.s34 orr w1, w2, #0x4000
35 orr x1, x2, #0x8000
37 ; CHECK: orr w1, w2, #0x4000 ; encoding: [0x41,0x00,0x12,0x32]
38 ; CHECK: orr x1, x2, #0x8000 ; encoding: [0x41,0x00,0x71,0xb2]
40 orr w8, wzr, #0x1
41 orr x8, xzr, #0x1
43 ; CHECK: orr w8, wzr, #0x1 ; encoding: [0xe8,0x03,0x00,0x32]
44 ; CHECK: orr x8, xzr, #0x1 ; encoding: [0xe8,0x03,0x40,0xb2]
182 orr w1, w2, w3
183 orr x1, x2, x3
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dillegal-bitfield-loadstore.ll9 ; LE-NEXT: orr r1, r1, #384
17 ; BE-NEXT: orr r1, r2, r1, lsl #8
18 ; BE-NEXT: orr r1, r1, #384
34 ; LE-NEXT: orr r2, r2, #49152
35 ; LE-NEXT: orr r1, r1, #384
45 ; BE-NEXT: orr r1, r1, #1
60 ; LE-NEXT: orr r3, r3, #57088
62 ; LE-NEXT: orr r1, r2, r1, lsl #13
70 ; BE-NEXT: orr r3, r3, #16711680
72 ; BE-NEXT: orr r1, r2, r1, lsl #13
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AArch64/
Dmovw-consts.ll12 ; CHECK: orr w0, wzr, #0x1
18 ; CHECK: orr w0, wzr, #0xffff
24 ; CHECK: orr w0, wzr, #0x10000
30 ; CHECK: orr w0, wzr, #0xffff0000
36 ; CHECK: orr x0, xzr, #0x100000000
42 ; CHECK: orr x0, xzr, #0xffff00000000
48 ; CHECK: orr x0, xzr, #0x1000000000000
85 ; CHECK: orr {{w[0-9]+}}, wzr, #0x1
92 ; CHECK: orr {{w[0-9]+}}, wzr, #0xffff
99 ; CHECK: orr {{w[0-9]+}}, wzr, #0x10000
[all …]
Darm64-patchpoint-webkit_jscc.ll41 ; CHECK: orr w[[REG:[0-9]+]], wzr, #0x6
43 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x4
45 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x2
53 ; FAST: orr [[REG1:x[0-9]+]], xzr, #0x2
55 ; FAST-NEXT: orr [[REG2:w[0-9]+]], wzr, #0x4
57 ; FAST-NEXT: orr [[REG3:x[0-9]+]], xzr, #0x6
75 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x8
77 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x6
79 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x4
81 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x2
[all …]
/external/llvm/test/CodeGen/AArch64/
Dmovw-consts.ll12 ; CHECK: orr w0, wzr, #0x1
18 ; CHECK: orr w0, wzr, #0xffff
24 ; CHECK: orr w0, wzr, #0x10000
30 ; CHECK: orr w0, wzr, #0xffff0000
36 ; CHECK: orr x0, xzr, #0x100000000
42 ; CHECK: orr x0, xzr, #0xffff00000000
48 ; CHECK: orr x0, xzr, #0x1000000000000
85 ; CHECK: orr {{w[0-9]+}}, wzr, #0x1
92 ; CHECK: orr {{w[0-9]+}}, wzr, #0xffff
99 ; CHECK: orr {{w[0-9]+}}, wzr, #0x10000
[all …]
Darm64-patchpoint-webkit_jscc.ll44 ; CHECK: orr w[[REG:[0-9]+]], wzr, #0x6
46 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x4
48 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x2
57 ; FAST: orr [[REG1:x[0-9]+]], xzr, #0x2
58 ; FAST-NEXT: orr [[REG2:w[0-9]+]], wzr, #0x4
59 ; FAST-NEXT: orr [[REG3:x[0-9]+]], xzr, #0x6
80 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x8
82 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x6
84 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x4
86 ; CHECK-NEXT: orr w[[REG:[0-9]+]], wzr, #0x2
[all …]
/external/u-boot/arch/arm/mach-orion5x/
Dlowlevel_init.S172 orr r0, r0, #SDRAM_PAD_CTRL_WR_EN
184 orr r1, r1, r1, LSL #6 /* r1[11:6]<DrvP> = r1[5:0]<DrvN> */
187 orr r0, r0, r1
194 orr r0, r0, #SDRAM_PAD_CTRL_WR_EN
206 orr r1, r1, r1, LSL #6 /* r1[5:0] = r3[22:17]<LockN> */
209 orr r0, r0, r1
220 orr r0, r0, #SDRAM_PAD_CTRL_WR_EN
226 orr r0, r0, r1
231 orr r0, r0, #SDRAM_PAD_CTRL_WR_EN
237 orr r0, r0, r1
[all …]
/external/u-boot/arch/arm/mach-davinci/
Dlowlevel_init.S57 orr r7, r7, $0x02
106 orr r8, r8, r9
162 orr r8, r8, r9
168 orr r7, r7, $0x01
185 orr r8, r8, r9
191 orr r7, r7, $0x01
210 orr r8, r8, $0x08
222 orr r8, r8, $0x01
234 orr r7, r7, $0x03
240 orr r7, r7, $0x01
[all …]
/external/boringssl/ios-arm/crypto/fipsmodule/
Daes-armv4.S207 orr r0,r0,r4,lsl#8
209 orr r0,r0,r5,lsl#16
211 orr r0,r0,r6,lsl#24
214 orr r1,r1,r4,lsl#8
216 orr r1,r1,r5,lsl#16
218 orr r1,r1,r6,lsl#24
221 orr r2,r2,r4,lsl#8
223 orr r2,r2,r5,lsl#16
225 orr r2,r2,r6,lsl#24
228 orr r3,r3,r4,lsl#8
[all …]
/external/boringssl/linux-arm/crypto/fipsmodule/
Daes-armv4.S206 orr r0,r0,r4,lsl#8
208 orr r0,r0,r5,lsl#16
210 orr r0,r0,r6,lsl#24
213 orr r1,r1,r4,lsl#8
215 orr r1,r1,r5,lsl#16
217 orr r1,r1,r6,lsl#24
220 orr r2,r2,r4,lsl#8
222 orr r2,r2,r5,lsl#16
224 orr r2,r2,r6,lsl#24
227 orr r3,r3,r4,lsl#8
[all …]
/external/u-boot/arch/arm/cpu/armv7/
Dstart.S61 orr r0, r0, #0xc0 @ disable FIQ and IRQ
156 orr r0, r0, #0x00000002 @ set bit 1 (--A-) Align
157 orr r0, r0, #0x00000800 @ set bit 11 (Z---) BTB
161 orr r0, r0, #0x00001000 @ set bit 12 (I) I-cache
167 orr r0, r0, #1 << 11 @ set bit #11
173 orr r0, r0, #1 << 4 @ set bit #4
179 orr r0, r0, #1 << 6 @ set bit #6
185 orr r0, r0, #1 << 11 @ set bit #11
190 orr r0, r0, #1 << 21 @ set bit #21
196 orr r0, r0, #1 << 22 @ set bit #22
[all …]
/external/u-boot/arch/arm/cpu/arm920t/ep93xx/
Dlowlevel_init.S248 orr r0, r0, #EP93XX_LED_RED_ON
261 orr r2, r2, r1
265 orr r2, r2, r1
269 orr r2, r2, r1
273 orr r2, r2, r1
277 orr r2, r2, r1
281 orr r2, r2, r1
339 orr r2, r11, #0x00008800
359 orr r2, r11, #0x00004600
376 orr r1, r1, #EP93XX_LED_GREEN_ON
[all …]
/external/u-boot/board/armltd/integrator/
Dlowlevel_init.S16 orr r1,r1,#CMMASK_RESET
45 orr r2,r2,#CMMASK_INIT_102
68 orr r2,r2,#CMMASK_CMxx6_COMMON
87 orr r1,r1,r2
160 orr r2, r1, r2, ASL#12 /* OR in column address lines */
161 orr r3, r2, r3, ASL#16 /* OR in number of banks */
162 orr r6, r6, r3 /* OR in size and CAS latency */
179 orr r1, r1, #CMMASK_REMAP /* set remap and led bits */
/external/boringssl/ios-aarch64/crypto/fipsmodule/
Dsha1-armv8.S60 orr w25,w25,w26
74 orr w25,w25,w26
85 orr w25,w25,w26
99 orr w25,w25,w26
110 orr w25,w25,w26
124 orr w25,w25,w26
135 orr w25,w25,w26
149 orr w25,w25,w26
160 orr w25,w25,w26
174 orr w25,w25,w26
[all …]
/external/boringssl/linux-aarch64/crypto/fipsmodule/
Dsha1-armv8.S61 orr w25,w25,w26
75 orr w25,w25,w26
86 orr w25,w25,w26
100 orr w25,w25,w26
111 orr w25,w25,w26
125 orr w25,w25,w26
136 orr w25,w25,w26
150 orr w25,w25,w26
161 orr w25,w25,w26
175 orr w25,w25,w26
[all …]
/external/u-boot/arch/arm/mach-uniphier/arm32/
Ddebug_ll.S35 orr r1, r1, #1
58 orr r1, r1, #SC_CLKCTRL_CEN_PERI
73 orr r1, r1, #1
99 orr r1, r1, #SC_CLKCTRL_CEN_PERI
114 orr r1, r1, #1
124 orr r1, r1, #SC_CLKCTRL_CEN_PERI
139 orr r1, r1, #1
148 orr r1, r1, #SC_CLKCTRL_CEN_PERI
/external/swiftshader/third_party/LLVM/test/CodeGen/Thumb2/
Dthumb2-orr2.ll10 ; CHECK: orr r0, r0, #187
18 ; CHECK: orr r0, r0, #11141290
26 ; CHECK: orr r0, r0, #-872363008
34 ; CHECK: orr r0, r0, #1145324612
42 ; CHECK: orr r0, r0, #1114112

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