/external/u-boot/arch/m68k/cpu/mcf5445x/ |
D | cpu_init.c | 89 out_8(&gpio->par_fbctl, in cpu_init_f() 93 out_8(&gpio->par_be, in cpu_init_f() 98 out_8(&pm->pmcr0, 17); in cpu_init_f() 101 out_8(&pm->pmcr0, 18); in cpu_init_f() 102 out_8(&pm->pmcr0, 19); in cpu_init_f() 103 out_8(&pm->pmcr0, 20); in cpu_init_f() 106 out_8(&pm->pmcr0, 22); in cpu_init_f() 107 out_8(&pm->pmcr1, 4); in cpu_init_f() 108 out_8(&pm->pmcr1, 7); in cpu_init_f() 111 out_8(&pm->pmcr0, 28); in cpu_init_f() [all …]
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/external/u-boot/arch/m68k/cpu/mcf530x/ |
D | cpu_init.c | 108 out_8(&sim->sypcr, 0x00); in cpu_init_f() 109 out_8(&sim->swivr, 0x0f); in cpu_init_f() 110 out_8(&sim->swsr, 0x00); in cpu_init_f() 111 out_8(&sim->mpark, 0x00); in cpu_init_f() 118 out_8(&icr->icr0, 0x00); /* sw watchdog */ in cpu_init_f() 119 out_8(&icr->icr1, 0x00); /* timer 1 */ in cpu_init_f() 120 out_8(&icr->icr2, 0x88); /* timer 2 */ in cpu_init_f() 121 out_8(&icr->icr3, 0x00); /* i2c */ in cpu_init_f() 122 out_8(&icr->icr4, 0x00); /* uart 0 */ in cpu_init_f() 123 out_8(&icr->icr5, 0x00); /* uart 1 */ in cpu_init_f() [all …]
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/external/u-boot/board/freescale/m5253evbe/ |
D | m5253evbe.c | 104 out_8(&ata->cr, 0); in ide_set_reset() 113 out_8(&ata->t1, CALC_TIMING(piotms[2][0])); in ide_set_reset() 114 out_8(&ata->t2w, CALC_TIMING(piotms[2][1])); in ide_set_reset() 115 out_8(&ata->t2r, CALC_TIMING(piotms[2][1])); in ide_set_reset() 116 out_8(&ata->ta, CALC_TIMING(piotms[2][8])); in ide_set_reset() 117 out_8(&ata->trd, CALC_TIMING(piotms[2][7])); in ide_set_reset() 118 out_8(&ata->t4, CALC_TIMING(piotms[2][3])); in ide_set_reset() 119 out_8(&ata->t9, CALC_TIMING(piotms[2][6])); in ide_set_reset() 122 out_8(&ata->cr, 0x40); in ide_set_reset()
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/external/u-boot/board/freescale/m5253demo/ |
D | m5253demo.c | 111 out_8(&ata->cr, 0); in ide_set_reset() 120 out_8(&ata->t1, CALC_TIMING(piotms[2][0])); in ide_set_reset() 121 out_8(&ata->t2w, CALC_TIMING(piotms[2][1])); in ide_set_reset() 122 out_8(&ata->t2r, CALC_TIMING(piotms[2][1])); in ide_set_reset() 123 out_8(&ata->ta, CALC_TIMING(piotms[2][8])); in ide_set_reset() 124 out_8(&ata->trd, CALC_TIMING(piotms[2][7])); in ide_set_reset() 125 out_8(&ata->t4, CALC_TIMING(piotms[2][3])); in ide_set_reset() 126 out_8(&ata->t9, CALC_TIMING(piotms[2][6])); in ide_set_reset() 129 out_8(&ata->cr, 0x40); in ide_set_reset()
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/external/u-boot/board/freescale/p1022ds/ |
D | diu.c | 172 out_8(&pixis->brdcfg1, temp); in platform_diu_init() 185 out_8(lbc_lcs0_ba, offsetof(ngpixis_t, brdcfg0)); in platform_diu_init() 187 out_8(lbc_lcs1_ba, px_brdcfg0 | PX_BRDCFG0_ELBC_DIU); in platform_diu_init() 224 out_8(lbc_lcs0_ba, offsetof(ngpixis_t, brdcfg0)); in set_mux_to_lbc() 225 out_8(lbc_lcs1_ba, px_brdcfg0); in set_mux_to_lbc() 229 out_8(lbc_lcs0_ba, offsetof(ngpixis_t, csr)); in set_mux_to_lbc() 268 out_8(lbc_lcs0_ba, offsetof(ngpixis_t, brdcfg0)); in set_mux_to_diu() 269 out_8(lbc_lcs1_ba, px_brdcfg0 | PX_BRDCFG0_ELBC_DIU); in set_mux_to_diu() 290 out_8(lbc_lcs0_ba, reg); in pixis_read() 312 out_8(lbc_lcs0_ba, reg); in pixis_write() [all …]
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/external/u-boot/board/freescale/m54455evb/ |
D | m54455evb.c | 46 out_8(&gpio->mscr_sdram, CONFIG_SYS_SDRAM_DRV_STRENGTH); in dram_init() 130 out_8(&ata->cr, 0); in ide_set_reset() 137 out_8(&ata->t1, CALC_TIMING(piotms[2][0])); in ide_set_reset() 138 out_8(&ata->t2w, CALC_TIMING(piotms[2][1])); in ide_set_reset() 139 out_8(&ata->t2r, CALC_TIMING(piotms[2][1])); in ide_set_reset() 140 out_8(&ata->ta, CALC_TIMING(piotms[2][8])); in ide_set_reset() 141 out_8(&ata->trd, CALC_TIMING(piotms[2][7])); in ide_set_reset() 142 out_8(&ata->t4, CALC_TIMING(piotms[2][3])); in ide_set_reset() 143 out_8(&ata->t9, CALC_TIMING(piotms[2][6])); in ide_set_reset() 146 out_8(&ata->cr, 0x40); in ide_set_reset()
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/external/u-boot/arch/m68k/cpu/mcf547x_8x/ |
D | cpu.c | 29 out_8(&gptmr->mode, GPT_TMS_SGPIO); in do_reset() 30 out_8(&gptmr->ctrl, GPT_CTRL_WDEN | GPT_CTRL_CE); in do_reset() 102 out_8(&gptmr->ocpw, 0xa5); in hw_watchdog_reset() 110 out_8(&gptmr->mode, 0); in watchdog_disable() 111 out_8(&gptmr->ctrl, 0); in watchdog_disable() 125 out_8(&gptmr->mode, GPT_TMS_SGPIO); in watchdog_init() 126 out_8(&gptmr->ctrl, GPT_CTRL_CE | GPT_CTRL_WDEN); in watchdog_init()
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D | cpu_init.c | 109 out_8(&gpio->par_psc0, GPIO_PAR_PSC0_TXD0 | GPIO_PAR_PSC0_RXD0); in uart_port_conf() 112 out_8(&gpio->par_psc1, GPIO_PAR_PSC1_TXD1 | GPIO_PAR_PSC1_RXD1); in uart_port_conf() 115 out_8(&gpio->par_psc2, GPIO_PAR_PSC2_TXD2 | GPIO_PAR_PSC2_RXD2); in uart_port_conf() 118 out_8(&gpio->par_psc3, GPIO_PAR_PSC3_TXD3 | GPIO_PAR_PSC3_RXD3); in uart_port_conf()
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/external/u-boot/board/keymile/km83xx/ |
D | km83xx_i2c.c | 19 out_8(&base->cr, (I2C_CR_MEN | I2C_CR_MSTA)); in i2c_write_start_seq() 21 out_8(&base->cr, (I2C_CR_MEN)); in i2c_write_start_seq() 35 out_8(&base->cr, (I2C_CR_MSTA)); in i2c_make_abort() 37 out_8(&base->cr, (I2C_CR_MEN | I2C_CR_MSTA)); in i2c_make_abort() 60 out_8(&base->cr, (I2C_CR_MEN)); in i2c_make_abort() 63 out_8(&base->sr, 0); in i2c_make_abort()
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/external/u-boot/board/freescale/mpc8568mds/ |
D | bcsr.c | 49 out_8(&bcsr[8], in_8(&bcsr[8]) & ~BCSR_UCC1_GETH_EN); in reset_8568mds_uccs() 50 out_8(&bcsr[9], in_8(&bcsr[9]) & ~BCSR_UCC2_GETH_EN); in reset_8568mds_uccs() 53 out_8(&bcsr[11], in_8(&bcsr[11]) & ~(BCSR_UCC1_MODE_MSK | in reset_8568mds_uccs() 57 out_8(&bcsr[8], in_8(&bcsr[8]) | BCSR_UCC1_GETH_EN); in reset_8568mds_uccs() 58 out_8(&bcsr[9], in_8(&bcsr[9]) | BCSR_UCC2_GETH_EN); in reset_8568mds_uccs()
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/external/u-boot/drivers/serial/ |
D | serial_mpc8xx.c | 99 out_8(&im->im_sdma.sdma_sdsr, CONFIG_SYS_SDSR); in smc_init() 102 out_8(&im->im_sdma.sdma_sdmr, CONFIG_SYS_SDMR); in smc_init() 128 out_8(&up->smc_rfcr, SMC_EB); in smc_init() 129 out_8(&up->smc_tfcr, SMC_EB); in smc_init() 138 out_8(&sp->smc_smcm, 0); in smc_init() 139 out_8(&sp->smc_smce, 0xff); in smc_init() 181 out_8(&rtx->txbuf, c); in smc_putc()
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/external/u-boot/board/freescale/c29xpcie/ |
D | cpld.c | 34 out_8(&cpld_data->flhcsr, (reg11 & CPLD_BANKSEL_MASK) in cpld_set_altbank() 38 out_8(&cpld_data->flhcsr, (reg11 & CPLD_BANKSEL_MASK) in cpld_set_altbank() 42 out_8(&cpld_data->flhcsr, (reg11 & CPLD_BANKSEL_MASK) in cpld_set_altbank() 46 out_8(&cpld_data->flhcsr, (reg11 & CPLD_BANKSEL_MASK) in cpld_set_altbank()
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/external/u-boot/board/freescale/common/ |
D | pixis.c | 19 out_8(pixis_base + PIXIS_RST, 0); in pixis_reset() 88 out_8(pixis_base + PIXIS_VCLKH, vclkh); in set_px_sysclk() 89 out_8(pixis_base + PIXIS_VCLKL, vclkl); in set_px_sysclk() 91 out_8(pixis_base + PIXIS_AUX, sysclk_aux); in set_px_sysclk() 174 out_8(pixis_base + PIXIS_VCFGEN0, tmp); in read_from_px_regs() 201 out_8(pixis_base + PIXIS_VCFGEN1, tmp); in read_from_px_regs_altbank()
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/external/u-boot/board/ids/ids8313/ |
D | ids8313.c | 168 out_8(spi_base, 0); in misc_init_r() 172 out_8(&uart1->umcr, IDSUMCR_RTS_MASK); in misc_init_r() 173 out_8(&uart2->umcr, IDSUMCR_RTS_MASK); in misc_init_r() 196 out_8(spi_base, 1 << slave->cs); in spi_cs_activate() 207 out_8(spi_base, 1 << slave->cs); in spi_cs_deactivate()
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/external/u-boot/drivers/spi/ |
D | mpc8xx_spi.c | 168 out_8(&spi->spi_tfcr, SMC_EB); in spi_init_f() 169 out_8(&spi->spi_rfcr, SMC_EB); in spi_init_f() 188 out_8(&cp->cp_spim, 0); /* Mask all SPI events */ in spi_init_f() 189 out_8(&cp->cp_spie, SPI_EMASK); /* Clear all SPI events */ in spi_init_f() 311 out_8(&cp->cp_spim, 0); /* Mask all SPI events */ in spi_xfer() 312 out_8(&cp->cp_spie, SPI_EMASK); /* Clear all SPI events */ in spi_xfer()
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/external/u-boot/arch/powerpc/cpu/mpc83xx/ |
D | pcie.c | 102 PCIE_OP(write, byte, u8, out_8) in PCIE_OP() 280 out_8(hose_cfg_base + PCI_PRIMARY_BUS, 0); in mpc83xx_pcie_init_bus() 281 out_8(hose_cfg_base + PCI_SECONDARY_BUS, 1); in mpc83xx_pcie_init_bus() 282 out_8(hose_cfg_base + PCI_SUBORDINATE_BUS, 255); in mpc83xx_pcie_init_bus() 296 out_8(hose_cfg_base + PCI_LATENCY_TIMER, 0x80); in mpc83xx_pcie_init_bus() 297 out_8(hose_cfg_base + PCI_CACHE_LINE_SIZE, 0x08); in mpc83xx_pcie_init_bus()
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/external/u-boot/board/keymile/kmp204x/ |
D | qrio.c | 159 out_8(qrio_base + CTRLH_OFF, ctrlh); in qrio_set_leds() 173 out_8(qrio_base + CTRLL_OFF, ctrll); in qrio_enable_app_buffer() 188 out_8(qrio_base + REASON1_OFF, reason1); in qrio_cpuwd_flag() 205 out_8(qrio_base + RSTCFG_OFF, rstcfg); in qrio_uprstreq()
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/external/u-boot/arch/arm/cpu/armv7/ls102xa/ |
D | ls102xa_psci.c | 178 out_8(qixis_base + QIXIS_CTL_SYS, tmp); in ls1_deep_sleep() 183 out_8(qixis_base + QIXIS_PWR_CTL2, tmp); in ls1_deep_sleep() 188 out_8(qixis_base + QIXIS_RST_FORCE_3, tmp); in ls1_deep_sleep() 216 out_8(qixis_base + QIXIS_CTL_SYS, tmp); in ls1_sleep()
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/external/u-boot/board/freescale/p1_p2_rdb_pc/ |
D | p1_p2_rdb_pc.c | 139 out_8(&cpld_data->wd_cfg, CPLD_WD_CFG); in board_cpld_init() 140 out_8(&cpld_data->status_led, CPLD_STATUS_LED); in board_cpld_init() 141 out_8(&cpld_data->fxo_led, CPLD_FXO_LED); in board_cpld_init() 142 out_8(&cpld_data->fxs_led, CPLD_FXS_LED); in board_cpld_init() 143 out_8(&cpld_data->system_rst, CPLD_SYS_RST); in board_cpld_init()
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/external/u-boot/board/freescale/m5329evb/ |
D | nand.c | 61 out_8(&gpio->pclrr_timer, 0); in board_nand_init() 62 out_8(&gpio->podr_timer, 0); in board_nand_init()
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/external/u-boot/board/freescale/m5373evb/ |
D | nand.c | 65 out_8(&gpio->pclrr_timer, 0); in board_nand_init() 66 out_8(&gpio->podr_timer, 0); in board_nand_init()
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/external/u-boot/arch/m68k/cpu/mcf52x2/ |
D | interrupts.c | 29 out_8(&intp->int_pivr, 0x40); in interrupt_init() 70 out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); in dtimer_intr_setup()
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D | speed.c | 23 out_8(&pll->odr, CONFIG_SYS_PLL_ODR); in get_clocks() 24 out_8(&pll->fdr, CONFIG_SYS_PLL_FDR); in get_clocks()
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/external/u-boot/arch/m68k/cpu/mcf5227x/ |
D | cpu_init.c | 92 out_8(&gpio->par_i2c, GPIO_PAR_I2C_SCL_SCL | GPIO_PAR_I2C_SDA_SDA); in cpu_init_f() 135 out_8(&gpio->par_dspi, in uart_port_conf() 146 out_8(&gpio->par_dspi, in cfspi_port_conf()
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/external/u-boot/board/freescale/m5235evb/ |
D | m5235evb.c | 35 out_8(&gpio->par_ad, in dram_init() 40 out_8(&gpio->par_sdram, in dram_init()
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